公开(公告)号：US20200091189A1

公开(公告)日：2020-03-19

申请号：US16692385

申请日：2019-11-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwang Soo Kim ,  Shin Hwan Kang ,  Jae Hoon Jang ,  Kohji Kanamori

IPC: H01L27/11582

Abstract: A memory device includes a plurality of gate electrode layers stacked on a substrate, a plurality of channel layers penetrating the plurality of gate electrode layers, a gate insulating layer between the plurality of gate electrode layers and the plurality of channel layers, and a common source line on the substrate adjacent to the gate electrode layers. The common source line includes a first part and a second part that are alternately arranged in a first direction and have different heights in a direction vertical to a top surface of the substrate. The gate insulating layer includes a plurality of vertical parts and a horizontal part. The plurality of vertical parts surrounds corresponding ones of the plurality of channel layers. The horizontal part extends parallel to a top surface of the substrate.

公开(公告)号：US10522562B2

公开(公告)日：2019-12-31

申请号：US16149249

申请日：2018-10-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwang Soo Kim ,  Shin Hwan Kang ,  Jae Hoon Jang ,  Kohji Kanamori

IPC: H01L27/11582 ,  H01L27/11556 ,  G11C16/04

Abstract: A memory device includes a plurality of gate electrode layers stacked on a substrate, a plurality of channel layers penetrating the plurality of gate electrode layers, a gate insulating layer between the plurality of gate electrode layers and the plurality of channel layers, and a common source line on the substrate adjacent to the gate electrode layers. The common source line includes a first part and a second part that are alternately arranged in a first direction and have different heights in a direction vertical to a top surface of the substrate. The gate insulating layer includes a plurality of vertical parts and a horizontal part. The plurality of vertical parts surrounds corresponding ones of the plurality of channel layers. The horizontal part extends parallel to a top surface of the substrate.

公开(公告)号：US11631692B2

公开(公告)日：2023-04-18

申请号：US16935306

申请日：2020-07-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hae Min Lee ,  Shin Hwan Kang ,  Jee Hoon Han

IPC: H01L27/11582 ,  H01L27/1157 ,  H01L27/11573

Abstract: A semiconductor memory device includes a peripheral logic structure including peripheral circuits on a substrate, a horizontal semiconductor layer extending along a top surface of the peripheral logic structure, a plurality of stack structures arranged on the horizontal semiconductor layer along a first direction, and a plurality of electrode separation regions in each of the plurality of stack structures to extend in a second direction, which is different from the first direction, wherein each of the plurality of stack structures includes a first electrode pad and a second electrode pad on the first electrode pad, the first electrode pad protruding in the first direction beyond the second electrode pad by a first width, and the first electrode pad protrudes in the second direction beyond the second electrode pad by a second width, which is different from the first width.

公开(公告)号：US11004865B2

公开(公告)日：2021-05-11

申请号：US16692385

申请日：2019-11-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwang Soo Kim ,  Shin Hwan Kang ,  Jae Hoon Jang ,  Kohji Kanamori

IPC: H01L27/11582 ,  H01L27/11556 ,  G11C16/04

Abstract: A memory device includes a plurality of gate electrode layers stacked on a substrate, a plurality of channel layers penetrating the plurality of gate electrode layers, a gate insulating layer between the plurality of gate electrode layers and the plurality of channel layers, and a common source line on the substrate adjacent to the gate electrode layers. The common source line includes a first part and a second part that are alternately arranged in a first direction and have different heights in a direction vertical to a top surface of the substrate. The gate insulating layer includes a plurality of vertical parts and a horizontal part. The plurality of vertical parts surrounds corresponding ones of the plurality of channel layers. The horizontal part extends parallel to a top surface of the substrate.