公开(公告)号：US11631692B2

公开(公告)日：2023-04-18

申请号：US16935306

申请日：2020-07-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hae Min Lee ,  Shin Hwan Kang ,  Jee Hoon Han

IPC: H01L27/11582 ,  H01L27/1157 ,  H01L27/11573

Abstract: A semiconductor memory device includes a peripheral logic structure including peripheral circuits on a substrate, a horizontal semiconductor layer extending along a top surface of the peripheral logic structure, a plurality of stack structures arranged on the horizontal semiconductor layer along a first direction, and a plurality of electrode separation regions in each of the plurality of stack structures to extend in a second direction, which is different from the first direction, wherein each of the plurality of stack structures includes a first electrode pad and a second electrode pad on the first electrode pad, the first electrode pad protruding in the first direction beyond the second electrode pad by a first width, and the first electrode pad protrudes in the second direction beyond the second electrode pad by a second width, which is different from the first width.