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公开(公告)号:US20230352520A1
公开(公告)日:2023-11-02
申请号:US18137782
申请日:2023-04-21
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger
IPC: H01L29/06 , H01L29/16 , H01L29/739 , H01L29/78
CPC classification number: H01L29/063 , H01L29/1608 , H01L29/7397 , H01L29/7813
Abstract: A wide band gap semiconductor device includes a semiconductor body having first and second opposing surfaces along a vertical direction. Trench gate structures extend into the semiconductor body from the first surface and include a gate electrode structure and a gate dielectric structure arranged between the gate electrode structure and the semiconductor body. The gate dielectric structure includes a high-k dielectric layer. A first sidewall of a trench gate structure adjoins a first mesa region. A second sidewall of the trench gate structure adjoins a second mesa region. The first mesa region includes a body region of a first conductivity type adjoining the first sidewall. The second mesa region includes a shielding region of the first conductivity type. A bottom side of the shielding region has a larger first vertical distance to the first surface than a bottom side of the body region in the first mesa region.
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22.
公开(公告)号:US11295951B2
公开(公告)日:2022-04-05
申请号:US16374457
申请日:2019-04-03
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Gerald Rescher , Michael Stadtmueller
Abstract: A method for forming a wide band gap semiconductor device is provided. The method includes forming a gate insulation layer on a wide band gap semiconductor substrate and annealing the gate insulation layer using at least a first reactive gas species and a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species. The method can include forming a gate electrode on the gate insulation layer after annealing the gate insulation layer.
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公开(公告)号:US11251269B2
公开(公告)日:2022-02-15
申请号:US16576396
申请日:2019-09-19
Applicant: Infineon Technologies AG
Inventor: Reinhard Ploss , Thomas Aichinger , Roland Rupp , Hans-Joachim Schulze
IPC: H01L29/10 , H01L29/06 , H01L29/423 , H01L29/16 , H01L29/66
Abstract: An embodiment of a semiconductor device includes a trench gate structure extending from a first surface into a silicon carbide semiconductor body along a vertical direction. A body region of a first conductivity type adjoins a sidewall of the trench gate structure and includes a first body sub-region adjoining the sidewall and a second body sub-region adjoining the sidewall. At least one profile of dopants of the first conductivity type along the vertical direction includes a first doping peak in the first body sub-region and a second doping peak in the second body sub-region. A doping concentration of the first doping peak is larger than a doping concentration of the second doping peak.
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公开(公告)号:US11101343B2
公开(公告)日:2021-08-24
申请号:US16404284
申请日:2019-05-06
Applicant: Infineon Technologies AG
Inventor: Ralf Siemieniec , Thomas Aichinger , Thomas Basler , Wolfgang Bergner , Rudolf Elpelt , Romain Esteve , Michael Hell , Daniel Kueck , Caspar Leendertz , Dethard Peters , Hans-Joachim Schulze
Abstract: A semiconductor component has a gate structure that extends from a first surface into an SiC semiconductor body. A body area in the SiC semiconductor body adjoins a first side wall of the gate structure. A first shielding area and a second shielding area of the conductivity type of the body area have at least twice as high a level of doping as the body area. A diode area forms a Schottky contact with a load electrode between the first shielding area and the second shielding area.
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公开(公告)号:US10734514B2
公开(公告)日:2020-08-04
申请号:US16054419
申请日:2018-08-03
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Romain Esteve , Dethard Peters , Roland Rupp , Ralf Siemieniec
IPC: H01L29/78 , H01L29/08 , H01L29/66 , H01L29/739 , H01L27/06 , H01L29/06 , H01L29/40 , H01L29/417 , H01L29/36 , H01L29/861 , H01L29/872 , H01L29/04
Abstract: A semiconductor device includes trench structures that extend from a first surface into a semiconductor body. The trench structures include a gate structure and a contact structure that extends through the gate structure, respectively. Transistor mesas are between the trench structures. Each transistor mesa includes a body zone forming a first pn junction with a drift structure and a second pn junction with a source zone. Diode regions directly adjoin one of the contact structures form a third pn junction with the drift structure, respectively.
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26.
公开(公告)号:US10714609B2
公开(公告)日:2020-07-14
申请号:US16385817
申请日:2019-04-16
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Dethard Peters , Ralf Siemieniec
IPC: H01L29/78 , H01L29/06 , H01L27/02 , H01L27/06 , H01L29/08 , H01L29/10 , H01L29/423 , H01L29/739 , H01L27/07 , H01L29/861 , H01L29/04 , H01L29/16
Abstract: A semiconductor device includes a plurality of gate trenches formed in a first surface of a semiconductor body and extending lengthwise parallel to one another, transistor cells and diode regions formed in a mesa of the semiconductor body between neighboring ones of the gate trenches, and a drift region in the semiconductor body beneath the gate trenches. Each transistor cell includes a source zone and a body region. Each diode region includes a contact portion and a lower doped shielding portion. The source zone forms a first p-n junction with the body region, and the body region forms a second p-n junction with the drift region. The contact region extends to the first surface, and the shielding portion forms a third p-n junction with the drift region. The shielding portion extends under bottoms of the neighboring ones of the gate trenches.
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27.
公开(公告)号:US10304953B2
公开(公告)日:2019-05-28
申请号:US14975385
申请日:2015-12-18
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Dethard Peters , Ralf Siemieniec
IPC: H01L29/78 , H01L29/04 , H01L29/16 , H01L27/02 , H01L27/06 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/423 , H01L29/739 , H01L29/861 , H01L27/07
Abstract: A semiconductor device includes stripe-shaped trench gate structures that extend in a semiconductor body along a first horizontal direction. Transistor mesas between neighboring trench gate structures include body regions and source zones, wherein the body regions form first pn junctions with a drift structure and second pn junctions with the source zones. The source zones directly adjoin two neighboring trench gate structures, respectively. Diode mesas that include at least portions of diode regions form third pn junctions with the drift structure. The diode mesas directly adjoin two neighboring trench gate structures, respectively. The transistor mesas and the diode mesas alternate at least along the first horizontal direction.
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28.
公开(公告)号:US10217636B2
公开(公告)日:2019-02-26
申请号:US15919918
申请日:2018-03-13
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Victorina Poenariu , Wolfgang Bergner , Romain Esteve , Daniel Kueck , Dethard Peters , Gerald Reinwald , Roland Rupp , Gerald Unegg
IPC: H01L29/16 , H01L29/66 , H01L21/02 , H01L21/04 , H01L29/10 , H01L29/78 , H01L29/40 , H01L29/861 , H01L29/06 , H01L21/3065 , H01L29/423
Abstract: A trench is formed that extends from a main surface into a crystalline silicon carbide semiconductor layer. A mask is formed that includes a mask opening exposing the trench and a rim section of the main surface around the trench. By irradiation with a particle beam a first portion of the semiconductor layer exposed by the mask opening and a second portion outside of the vertical projection of the mask opening and directly adjoining to the first portion are amorphized. A vertical extension of the amorphized second portion gradually decreases with increasing distance to the first portion. The amorphized first and second portions are removed.
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29.
公开(公告)号:US20180204725A1
公开(公告)日:2018-07-19
申请号:US15919918
申请日:2018-03-13
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Victorina Poenariu , Wolfgang Bergner , Romain Esteve , Daniel Kueck , Dethard Peters , Gerald Reinwald , Roland Rupp , Gerald Unegg
IPC: H01L21/04 , H01L29/861 , H01L29/78 , H01L29/66 , H01L29/423 , H01L29/40 , H01L21/3065 , H01L29/16 , H01L29/10 , H01L29/06
CPC classification number: H01L21/0475 , H01L21/049 , H01L21/3065 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/401 , H01L29/42376 , H01L29/4238 , H01L29/66068 , H01L29/7813 , H01L29/8613
Abstract: A trench is formed that extends from a main surface into a crystalline silicon carbide semiconductor layer. A mask is formed that includes a mask opening exposing the trench and a rim section of the main surface around the trench. By irradiation with a particle beam a first portion of the semiconductor layer exposed by the mask opening and a second portion outside of the vertical projection of the mask opening and directly adjoining to the first portion are amorphized. A vertical extension of the amorphized second portion gradually decreases with increasing distance to the first portion. The amorphized first and second portions are removed.
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公开(公告)号:US20180158920A1
公开(公告)日:2018-06-07
申请号:US15866755
申请日:2018-01-10
Applicant: Infineon Technologies AG
Inventor: Ralf Siemieniec , Dethard Peters , Romain Esteve , Wolfgang Bergner , Thomas Aichinger , Daniel Kueck , Roland Rupp , Bernd Zippelius , Karlheinz Feldrapp , Christian Strenger
IPC: H01L29/423 , H01L29/78 , H01L29/739 , H01L29/10 , H01L29/20 , H01L29/04 , H01L29/16
CPC classification number: H01L29/4236 , H01L29/04 , H01L29/045 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/2003 , H01L29/407 , H01L29/7397 , H01L29/7827
Abstract: A semiconductor device includes a semiconductor body formed from a semiconductor material with a band-gap of at least 2.0 eV, the semiconductor body having a diode region and a source region. The semiconductor device further includes a trench gate structure having a first sidewall and a second sidewall opposite the first sidewall, the first sidewall and the second sidewall extending along a common longitudinal direction. A doping concentration of a first doping type is higher in the diode region than in the source region. The trench gate structure projects from a first surface of the semiconductor body into the semiconductor body. A first portion of the second sidewall at the first surface is directly adjoined by the source region. A second portion of the second sidewall is in direct contact with the diode region. Additional semiconductor device embodiments are provided.
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