Integrated Circuit Package For High Bandwidth Memory

    公开(公告)号:US20230042856A1

    公开(公告)日:2023-02-09

    申请号:US17970237

    申请日:2022-10-20

    Applicant: Google LLC

    Abstract: An integrated circuit package including a substrate configured to receive one or more high-bandwidth memory (HBM) stacks on the substrate, an interposer positioned on the substrate and configured to receive a logic die on the interposer, a plurality of interposer channels formed in the interposer and connecting the logic die to the one or more HBM stacks, and a plurality of substrate traces formed in the substrate and configured to interface the plurality of interposer channels to the one or more HBM stacks.

    Asic Package With Photonics And Vertical Power Delivery

    公开(公告)号:US20220139876A1

    公开(公告)日:2022-05-05

    申请号:US17579012

    申请日:2022-01-19

    Applicant: Google LLC

    Abstract: The technology relates to an integrated circuit (IC) package. The IC package may include a substrate. An IC die may be mounted to the substrate. One or more photonic modules may be attached to the substrate and one or more serializer/deserializer (SerDes) interfaces may connect the IC die to the one or more photonic modules. The IC die may be an application specific integrated circuit (ASIC) die and the one or more photonic modules may include a photonic integrated circuit (PIC) and fiber array. The one or more photonic modules may be mounted to one or more additional substrates which may be attached to the substrate via one or more sockets.

    Cooling electronic devices in a data center

    公开(公告)号:US10681846B2

    公开(公告)日:2020-06-09

    申请号:US15957161

    申请日:2018-04-19

    Applicant: Google LLC

    Abstract: A server tray package includes a motherboard assembly that includes a plurality of data center electronic devices, the plurality of data center electronic devices including at least one heat generating processor device; and a liquid cold plate assembly. The liquid cold plate assembly includes a base portion mounted to the motherboard assembly, the base portion and motherboard assembly defining a volume that at least partially encloses the plurality of data center electronic devices; and a top portion mounted to the base portion and including a heat transfer member shaped to thermally contact the heat generating processor device, the heat transfer member including an inlet port and an outlet port that are in fluid communication with a cooling liquid flow path defined through the heat transfer member.

    Methods and heat distribution devices for thermal management of chip assemblies

    公开(公告)号:US12278160B2

    公开(公告)日:2025-04-15

    申请号:US18099337

    申请日:2023-01-20

    Applicant: Google LLC

    Abstract: According to an aspect of the disclosure, an example microelectronic device assembly includes a substrate, a microelectronic element electrically connected to the substrate, a stiffener element overlying the substrate, and a heat distribution device overlying the rear surface of the microelectronic element. The stiffener element may extend around the microelectronic element. The stiffener element may include a first material that has a first coefficient of thermal expansion (“CTE”). A surface of the stiffener element may face toward the heat distribution device. The heat distribution device may include a second material that has a second CTE. The first material may be different than the second material. The first CTE of the first material of the stiffener element may be greater than the second CTE of the second material of the heat distribution device.

    Deep trench capacitors embedded in package substrate

    公开(公告)号:US12238940B2

    公开(公告)日:2025-02-25

    申请号:US18244716

    申请日:2023-09-11

    Applicant: Google LLC

    Abstract: This disclosure relates to deep trench capacitors embedded in a package substrate on which an integrated circuit is mounted. In some aspects, a chip package includes an integrated circuit die that has a power distribution circuit for one or more circuits of the integrated circuit. The chip package also includes a substrate different from the integrated circuit and having a first surface on which the integrated circuit die is mounted and a second surface opposite the first surface. The substrate includes one or more cavities formed in at least one of the first surface or the second surface. The chip package also includes one or more deep trench capacitors disposed in at least one of the one or more cavities. Each deep trench capacitor is connected to the power distribution circuit by conductors.

    Socket To Support High Performance Multi-die ASICs

    公开(公告)号:US20240096859A1

    公开(公告)日:2024-03-21

    申请号:US17993240

    申请日:2022-11-23

    Applicant: Google LLC

    Abstract: A microelectronic system may include a microelectronic component having electrically conductive elements exposed at a first surface thereof, a socket mounted to a first surface of the microelectronic component and including a substrate embedded therein, one or more microelectronic elements each having active semiconductor devices therein and each having element contacts exposed at a front face thereof, and a plurality of socket pins mounted to and extending above the substrate, the socket pins being ground shielded coaxial socket pins. The one or more microelectronic elements may be disposed at least partially within a recess defined within the socket. The socket may have a land grid array comprising top surfaces of the plurality of the socket pins or electrically conductive pads mounted to corresponding ones of the socket pins, and the element contacts of the one or more microelectronic elements may be pressed into contact with the land grid array.

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