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    PARALLEL QDM ENCODING
    12.
    发明公开
    PARALLEL QDM ENCODING 审中-公开

    公开(公告)号：US20240223305A1

    公开(公告)日：2024-07-04

    申请号：US18563547

    申请日：2021-07-30

    Applicant: QUALCOMM Incorporated

    Inventor： Liangming WU ,  Ori SHENTAL ,  Thomas Joseph RICHARDSON ,  Kexin XIAO ,  Wei LIU ,  Changlong XU ,  Hao XU

    IPC: H04L1/00

    CPC classification number: H04L1/0041 ,  H04L1/0047

    Abstract: Certain aspects of the present disclosure provide a technique for parallel distribution matching (DM) encoding. A user equipment (UE) implements the technique to perform a first round of parallel DM encoding using k information bits as input by: 1) segmenting the k information bits into N blocks of information bits, and 2) encoding the N blocks of information bits in parallel with N DM blocks. Each of the N blocks outputs one or more encoded information bits in each of the NDM blocks, and a total number of information bits output by the N DM blocks is less than k. The UE then performs a second round of parallel DM encoding using k′ information bits that were not encoded in the first round of DM encoding. The second round of parallel DM encoding includes a same encoding process as implemented in the first round of parallel DC encoding.

    Data integrity checking between circuits
    17.
    发明授权
    Data integrity checking between circuits 有权

    公开(公告)号：US12015422B1

    公开(公告)日：2024-06-18

    申请号：US18173986

    申请日：2023-02-24

    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC

    Inventor： Brian Farrell ,  Thomas M. Forest ,  Karl B. Leboeuf ,  Kenneth William Junk

    IPC: H03M13/09 ,  H04L1/00 ,  H04L9/08

    CPC classification number: H03M13/09 ,  H04L1/0041 ,  H04L9/0869 ,  H04L2209/16

    Abstract: An apparatus has a communication bus, a first circuit, and a second circuit. The first circuit is operational to generate a package, calculate a check value of payload data in the package with a particular cyclic redundance check variant and an obfuscation type, store an encrypted check value in a footer of the package, store an encrypted obfuscation code in a header of the package, and transmit the package on the communication bus. The second circuit is operational to receive the package from the communication bus, decrypt the encrypted check value to determine the check value calculated by the first circuit, determine an obfuscation type from the encrypted obfuscation code, perform a payload verification of the payload data with the particular cyclic redundancy check variant with the obfuscation type applied and the check value, and signal that the payload data is valid in response to passage of the payload verification.

    Unidirectional data transfer system and corresponding method
    18.
    发明授权
    Unidirectional data transfer system and corresponding method 有权

    公开(公告)号：US12009883B2

    公开(公告)日：2024-06-11

    申请号：US17640737

    申请日：2020-09-02

    Applicant: TEREGA SOLUTIONS

    Inventor： Jésus Viu ,  Christophe Holmes

    IPC: H04B3/50 ,  H04L1/00

    CPC classification number: H04B3/50 ,  H04L1/0041 ,  H04L1/0045

    Abstract: The unidirectional data transfer system (3) comprises a data emitting device (5), a data receiving device (6) and a first unidirectional wire link (7) connecting the emitting and receiving devices such that the data passes from the emitting device to the receiving device.
    The first wire link includes a non-controllable unidirectional component (8) and the unidirectional transfer system further includes a device (19a, 19b, 20) for monitoring the quality of the transferred data.

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