公开(公告)号：US20180145001A1

公开(公告)日：2018-05-24

申请号：US15876833

申请日：2018-01-22

申请人： Renesas Electronics Corporation

发明人： Toshihiko Akiba ,  Bunji Yasumura ,  Masanao Sato ,  Hiromi Abe

IPC分类号： H01L21/66 ,  H01L23/00

CPC分类号： H01L22/32 ,  G01R31/26 ,  H01L22/14 ,  H01L22/20 ,  H01L22/30 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/02166 ,  H01L2224/02313 ,  H01L2224/02371 ,  H01L2224/02373 ,  H01L2224/02381 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05012 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05187 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/06133 ,  H01L2224/06135 ,  H01L2224/10 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2224/4911 ,  H01L2224/49429 ,  H01L2224/49431 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85951 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/1306 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2924/00012

摘要： Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.

公开(公告)号：US20180106863A1

公开(公告)日：2018-04-19

申请号：US15845339

申请日：2017-12-18

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Lee D. Whetsel ,  Baher S. Haroun

IPC分类号： G01R31/3177 ,  G01R31/317 ,  G01R31/26 ,  G01R31/3185

CPC分类号： G01R31/3177 ,  G01R31/26 ,  G01R31/31723 ,  G01R31/318505 ,  G01R31/318577

摘要： This disclosure describes a novel .method and apparatus for testing TSVs within a semiconductor device. According to embodiments illustrated and described in the disclosure, a TSV may be tested by stimulating and measuring a response from a first end of a TSV while the second end of the TSV held at ground potential. Multiple TSVs within the semiconductor device may be tested in parallel to reduce the TSV testing time according to the disclosure.

公开(公告)号：US09947457B2

公开(公告)日：2018-04-17

申请号：US15443653

申请日：2017-02-27

申请人： SEMCNS CO., LTD.

发明人： Yoon Hyuck Choi ,  Kwang Jae Oh ,  Ki Young Kim

IPC分类号： H01F27/28 ,  G01R1/073 ,  G01R31/28 ,  H01F27/29

CPC分类号： H01F27/2804 ,  G01R1/07378 ,  G01R31/26 ,  G01R31/2889 ,  H01F27/29 ,  H01F27/292

摘要： Disclosed herein is a pre space transformer including: a substrate having a first surface and a second surface, which is an opposite surface to the first surface; individual electrodes disposed on the first surface; and common electrodes disposed in the substrate, wherein the individual electrodes are repeatedly disposed while configuring a unit pattern.

公开(公告)号：US20180076590A1

公开(公告)日：2018-03-15

申请号：US15563297

申请日：2016-03-22

申请人： ENPLAS CORPORATION

发明人： Takahiro ODA

IPC分类号： H01R33/76 ,  H01R12/88 ,  H01R13/03 ,  H01R12/57 ,  G01R1/067 ,  G01R1/073 ,  G01R31/26

CPC分类号： H01R33/76 ,  G01R1/067 ,  G01R1/06722 ,  G01R1/073 ,  G01R31/26 ,  H01R12/57 ,  H01R12/88 ,  H01R13/03 ,  H01R13/24 ,  H01R13/2435

摘要： An electric contact having a contact resistance that is hardly increased even if the electric contact is repeatedly used for a long period of time. A base material of an electric contact is provided with a first contact part that is in contact with a first electrode of a first electric component, a second contact part that is in contact with a second electrode of a second electric component, and a spring part that presses the first contact part to the first electrode, and a wear-resistant contact point film is formed on a distal end portion of the first contact part. Furthermore, a highly conductive film is formed between a region of the wear-resistant contact point film and a distal end portion of the second contact part in the base material.

公开(公告)号：US20180069030A1

公开(公告)日：2018-03-08

申请号：US15531509

申请日：2016-11-07

申请人： BOE TECHNOLOGY GROUP CO., LTD. ,  HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD

发明人： Shiju ZHANG ,  Xingfeng REN ,  Guoquan LIU

IPC分类号： H01L27/12 ,  G02F1/1362 ,  H01L27/115 ,  G11C16/10 ,  H01L21/77 ,  H01L23/00 ,  H01L27/32

CPC分类号： H01L27/1244 ,  G01R31/26 ,  G02F1/136227 ,  G02F1/136259 ,  G02F2001/136263 ,  G11C16/10 ,  H01L21/77 ,  H01L22/34 ,  H01L24/49 ,  H01L27/115 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/14636 ,  H01L27/14692 ,  H01L27/3276

摘要： The present application discloses a fabrication method for forming an array substrate, including: forming, in a fanout region, a first signal-load line connected to a first group of data lead wires, and a second signal-load line connected to a second group of data lead wires; and forming, in the fanout region, at least one unidirectional device at a connection point of the first signal-load line and a data lead wire, at least one unidirectional device at a connection point of the second signal-load line and a data lead wire. The first signal-load line and the second signal-load line are each configured to transmit an external testing signal along a single direction to the data lead wires through the unidirectional devices.

公开(公告)号：US09893488B2

公开(公告)日：2018-02-13

申请号：US14595848

申请日：2015-01-13

申请人： MACOM Technology Solutions Holdings, Inc.

发明人： Alex A. Behfar ,  Malcolm R. Green ,  Cristian Stagarescu

IPC分类号： H01S5/00 ,  H01S5/20 ,  H01S5/22 ,  G01R31/26 ,  H01S5/10 ,  H01S5/12 ,  H01S5/223 ,  H01S5/343 ,  H01S5/02 ,  H01S5/028

CPC分类号： H01S5/0014 ,  G01R31/26 ,  G01R31/2635 ,  H01S5/0042 ,  H01S5/0201 ,  H01S5/0203 ,  H01S5/028 ,  H01S5/0287 ,  H01S5/1014 ,  H01S5/12 ,  H01S5/20 ,  H01S5/22 ,  H01S5/223 ,  H01S5/34306 ,  H01S5/34313 ,  H01S5/34333

摘要： A laser chip having a substrate, an epitaxial structure on the substrate, the epitaxial structure including an active region and the active region generating light, a waveguide formed in the epitaxial structure extending in a first direction, the waveguide having a front etched facet and a back etched facet that define an edge-emitting laser, and a first recessed region formed in the epitaxial structure, the first recessed region being arranged at a distance from the waveguide and having an opening adjacent to the back etched facet, the first recessed region facilitating testing of an adjacent laser chip prior to singulation of the laser chip.

公开(公告)号：US09880222B2

公开(公告)日：2018-01-30

申请号：US15176874

申请日：2016-06-08

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Lee D. Whetsel ,  Baher S. Haroun

IPC分类号： G01R31/3177 ,  G01R31/26 ,  G01R31/3185 ,  G01R31/317

CPC分类号： G01R31/3177 ,  G01R31/26 ,  G01R31/31723 ,  G01R31/318505 ,  G01R31/318577

摘要： This disclosure describes a novel method and apparatus for testing TSVs within a semiconductor device. According to embodiments illustrated and described in the disclosure, a TSV may be tested by stimulating and measuring a response from a first end of a TSV while the second end of the TSV held at ground potential. Multiple TSVs within the semiconductor device may be tested in parallel to reduce the TSV testing time according to the disclosure.

公开(公告)号：US20170345720A1

公开(公告)日：2017-11-30

申请号：US15164129

申请日：2016-05-25

申请人： United Microelectronics Corp.

发明人： Hsin-Pang Lu ,  Hsin-Wen Chen

IPC分类号： H01L21/8234 ,  H01L21/66 ,  G05F1/56 ,  H01L49/02 ,  G01R31/26

CPC分类号： G01R31/26 ,  G05F1/56 ,  H01L21/823892 ,  H01L27/092 ,  H01L28/40

摘要： A method for controlling voltage of a doped well in a substrate is provided. The substrate and the doped well are in different conductive type. The method includes applying a substrate voltage to the substrate while a well power for applying a well voltage to the doped well is turned off. The method also includes detecting a voltage level of one of the doped well and the substrate to judge whether or not a voltage target is reached. The well power is turned on to apply the well voltage to the doped well when the voltage level as detected reaches to the voltage target.

公开(公告)号：US09823291B2

公开(公告)日：2017-11-21

申请号：US14810831

申请日：2015-07-28

申请人： FUJITSU LIMITED

发明人： Takahiro Shikibu ,  Tatsumi Nakada

IPC分类号： G01R31/26 ,  G01R31/28 ,  H01L21/66 ,  H01L23/538 ,  H01L25/065 ,  H01L23/00

CPC分类号： G01R31/26 ,  G01R31/2853 ,  G01R31/2856 ,  H01L22/22 ,  H01L23/5382 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06596

摘要： A semiconductor device includes: a plurality of semiconductor chips; and a connecting portion that connects a plurality of terminals formed on the plurality of semiconductor chips, wherein the plurality of terminals of the plurality of semiconductor chips belong to one of first group or second group, an interval between one of first terminals belonging to the first group and one of second terminals belonging to the second group is a predetermined interval, the one of the second terminals being adjacent to the one of the first terminal, the first terminals are arranged at an interval larger than the predetermined interval, and each of the plurality of semiconductor chips includes a selecting portion that selects a signal transmitting terminal among the plurality of terminals, per each of the groups.

公开(公告)号：US09797993B2

公开(公告)日：2017-10-24

申请号：US14141653

申请日：2013-12-27

申请人： Gerald W. Pauly ,  Walter J. Keller, III

发明人： Gerald W. Pauly ,  Walter J. Keller, III

IPC分类号： G01S7/41 ,  G01R31/01 ,  G01R31/26 ,  G01R31/317 ,  G01R29/08 ,  G01R31/28 ,  G01R31/265 ,  G01R31/302

CPC分类号： G01S7/41 ,  G01R29/0871 ,  G01R31/01 ,  G01R31/26 ,  G01R31/2642 ,  G01R31/265 ,  G01R31/2851 ,  G01R31/2894 ,  G01R31/302 ,  G01R31/31703

摘要： A device and a method for monitoring and analysis utilize unintended electromagnetic emissions of electrically powered components, devices or systems. The emissions are received at the antenna and a receiver. A processor processes and measures change or changes in a signature of the unintended electromagnetic emissions. The measurement are analyzed to both record a baseline score for future measurements and to be used in determining status and/or health of the analyzed system or component.