公开(公告)号：US20220359659A1

公开(公告)日：2022-11-10

申请号：US17872439

申请日：2022-07-25

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Zhi-Chang Lin ,  Shih-Cheng Chen ,  Jung-Hung Chang ,  Lo-Heng Chang

IPC分类号： H01L29/08 ,  H01L29/66

摘要： Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises alternately forming first semiconductor layers and second semiconductor layers over a substrate, wherein the first semiconductor layers and the second semiconductor layers include different materials and are stacked up along a direction substantially perpendicular to a top surface of the substrate; forming a dummy gate structure over the first and second semiconductor layers; forming a source/drain (S/D) trench along a sidewall of the dummy gate structure; forming inner spacers between edge portions of the first semiconductor layers, wherein the inner spacers are bended towards the second semiconductor layers; and epitaxially growing a S/D feature in the S/D trench, wherein the S/D feature contacts the first semiconductor layers and includes facets forming a recession away from the inner spacers.

公开(公告)号：US11430892B2

公开(公告)日：2022-08-30

申请号：US16704110

申请日：2019-12-05

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Kuo-Cheng Chiang ,  Zhi-Chang Lin ,  Shih-Cheng Chen ,  Chih-Hao Wang ,  Pei-Hsun Wang ,  Lo-Heng Chang ,  Jung-Hung Chang

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/417

摘要： A semiconductor device and a method of forming the same are provided. A semiconductor device according to the present disclosure includes a first source/drain feature, a second source/drain feature, a first semiconductor channel member and a second semiconductor channel member extending between the first and second source/drain features, and a first dielectric feature and a second dielectric feature each including a first dielectric layer and a second dielectric layer different from the first dielectric layer. The first and second dielectric features are sandwiched between the first and second semiconductor channel members.

公开(公告)号：US11309424B2

公开(公告)日：2022-04-19

申请号：US16847204

申请日：2020-04-13

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Zhi-Chang Lin ,  Shih-Cheng Chen ,  Jung-Hung Chang ,  Lo-Heng Chang ,  Chien-Ning Yao

IPC分类号： H01L29/423 ,  H01L21/02 ,  H01L29/66 ,  H01L29/786 ,  H01L29/06

摘要： A semiconductor device includes a substrate, a semiconductor layer, a gate structure, source/drain regions, a bottom isolation layer, and a bottom spacer. The semiconductor layer is above the substrate. The gate structure is above the substrate and surrounds the semiconductor layer. The source/drain regions are on opposite sides of the semiconductor layer. The bottom isolation layer is between the substrate and the semiconductor layer. The bottom spacer is on a sidewall of the bottom isolation layer.

公开(公告)号：US20210074548A1

公开(公告)日：2021-03-11

申请号：US17102213

申请日：2020-11-23

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chun-Hsiung Lin ,  Shih-Cheng Chen ,  Chih-Hao Wang ,  Jung-Hung Chang ,  Jui-Chien Huang

IPC分类号： H01L21/285 ,  H01L29/06 ,  H01L29/423 ,  H01L29/45 ,  H01L29/786 ,  H01L29/66 ,  H01L21/02 ,  H01L21/311

摘要： A semiconductor structure includes a semiconductor fin disposed over a substrate, an epitaxial source/drain (S/D) feature disposed over the semiconductor fin, a silicide layer disposed over the epitaxial S/D feature, the silicide layer is disposed on sidewalls of the epitaxial S/D feature, a dielectric layer disposed over sidewalls of the silicide layer, and an S/D contact disposed over the epitaxial S/D feature in an interlayer dielectric (ILD) layer.

公开(公告)号：US20240363440A1

公开(公告)日：2024-10-31

申请号：US18771068

申请日：2024-07-12

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Pei-Hsun Wang ,  Shih-Cheng Chen ,  Chun-Hsiung Lin ,  Chih-Hao Wang

IPC分类号： H01L21/8238 ,  H01L21/306 ,  H01L21/3065 ,  H01L27/092

CPC分类号： H01L21/823821 ,  H01L21/823814 ,  H01L27/0924 ,  H01L21/30604 ,  H01L21/3065

摘要： A method includes forming an epitaxy semiconductor layer over a semiconductor substrate, and etching the epitaxy semiconductor layer and the semiconductor substrate to form a semiconductor strip, which includes an upper portion acting as a mandrel, and a lower portion under the mandrel. The upper portion is a remaining portion of the epitaxy semiconductor layer, and the lower portion is a remaining portion of the semiconductor substrate. The method further includes growing a first semiconductor fin starting from a first sidewall of the mandrel, growing a second semiconductor fin starting from a second sidewall of the mandrel. The first sidewall and the second sidewall are opposite sidewalls of the mandrel. A first transistor is formed based on the first semiconductor fin. A second transistor is formed based on the second semiconductor fin.

公开(公告)号：US12119270B2

公开(公告)日：2024-10-15

申请号：US17360135

申请日：2021-06-28

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Pei-Hsun Wang ,  Shih-Cheng Chen ,  Chun-Hsiung Lin ,  Chih-Hao Wang

IPC分类号： H01L21/8238 ,  H01L27/092 ,  H01L21/306 ,  H01L21/3065

CPC分类号： H01L21/823821 ,  H01L21/823814 ,  H01L27/0924 ,  H01L21/30604 ,  H01L21/3065

摘要： A method includes forming an epitaxy semiconductor layer over a semiconductor substrate, and etching the epitaxy semiconductor layer and the semiconductor substrate to form a semiconductor strip, which includes an upper portion acting as a mandrel, and a lower portion under the mandrel. The upper portion is a remaining portion of the epitaxy semiconductor layer, and the lower portion is a remaining portion of the semiconductor substrate. The method further includes growing a first semiconductor fin starting from a first sidewall of the mandrel, growing a second semiconductor fin starting from a second sidewall of the mandrel. The first sidewall and the second sidewall are opposite sidewalls of the mandrel. A first transistor is formed based on the first semiconductor fin. A second transistor is formed based on the second semiconductor fin.

公开(公告)号：US20240313118A1

公开(公告)日：2024-09-19

申请号：US18673596

申请日：2024-05-24

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Pei-Hsun Wang ,  Chih-Chao Chou ,  Shih-Cheng Chen ,  Jung-Hung Chang ,  Jui-Chien Huang ,  Chun-Hsiung Lin ,  Chih-Hao Wang

IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L21/285 ,  H01L29/06 ,  H01L29/423 ,  H01L29/45 ,  H01L29/66

CPC分类号： H01L29/78618 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/28518 ,  H01L29/0653 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/45 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/78684 ,  H01L29/78696

摘要： The present disclosure provides a semiconductor device that includes a semiconductor fin disposed over a substrate, an isolation structure at least partially surrounding the fin, an epitaxial source/drain (S/D) feature disposed over the semiconductor fin, where an extended portion of the epitaxial S/D feature extends over the isolation structure, and a silicide layer disposed on the epitaxial S/D feature, where the silicide layer covers top, bottom, sidewall, front, and back surfaces of the extended portion of the S/D feature.

公开(公告)号：US20230369054A1

公开(公告)日：2023-11-16

申请号：US18358152

申请日：2023-07-25

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chun-Hsiung Lin ,  Shih-Cheng Chen ,  Chih-Hao Wang ,  Jung-Hung Chang ,  Jui-Chien Huang

IPC分类号： H01L21/285 ,  H01L29/06 ,  H01L29/423 ,  H01L29/45 ,  H01L29/786 ,  H01L29/66 ,  H01L21/02 ,  H01L21/311

CPC分类号： H01L21/28518 ,  H01L21/02236 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/31111 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/45 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/78618 ,  H01L29/78696

摘要： A semiconductor structure includes a semiconductor fin extending from a substrate, a source/drain (S/D) feature disposed over the semiconductor fin, a silicide layer disposed over the S/D feature, where the silicide layer extends along a sidewall of the S/D feature, and an etch-stop layer (ESL) disposed along a sidewall of the silicide layer.

公开(公告)号：US11532626B2

公开(公告)日：2022-12-20

申请号：US16888537

申请日：2020-05-29

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Jung-Hung Chang ,  Lo-Heng Chang ,  Zhi-Chang Lin ,  Shih-Cheng Chen ,  Kuo-Cheng Chiang ,  Chih-Hao Wang

IPC分类号： H01L29/78 ,  H01L27/092 ,  H01L21/02 ,  H01L21/8238 ,  H01L29/08 ,  H01L29/66 ,  H01L29/10

摘要： A semiconductor device according to the present disclosure includes a bottom dielectric feature on a substrate, a plurality of channel members directly over the bottom dielectric feature, a gate structure wrapping around each of the plurality of channel members, two first epitaxial features sandwiching the bottom dielectric feature along a first direction, and two second epitaxial features sandwiching the plurality of channel members along the first direction.

公开(公告)号：US20220157994A1

公开(公告)日：2022-05-19

申请号：US17666240

申请日：2022-02-07

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Shih-Cheng Chen ,  Kuo-Cheng Chiang ,  Zhi-Chang Lin

IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

摘要： A semiconductor device according to the present disclosure includes an active region including a channel region and a source/drain region adjacent the channel region, a vertical stack of channel members over the channel region, a gate structure over and around the vertical stack of channel members, a bottom dielectric feature over the source/drain region, a source/drain feature over the bottom dielectric feature, and a germanium layer disposed between the bottom dielectric feature and the source/drain region.