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    Variable resistance memory devices
    11.
    发明授权
    Variable resistance memory devices 有权

    公开(公告)号：US10468594B2

    公开(公告)日：2019-11-05

    申请号：US15358544

    申请日：2016-11-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jin-Woo Lee ,  Soon-Oh Park ,  Jeong-Hee Park ,  Hideki Horii

    IPC: H01L45/00 ,  H01L27/24

    Abstract: A variable resistance memory device includes a pattern of one or more first conductive lines, a pattern of one or more second conductive lines, and a memory structure between the first and second conductive lines. The pattern of first conductive lines extends in a first direction on a substrate, and the first conductive lines extend in a second direction crossing the first direction. The pattern of second conductive lines extends in the second direction on the first conductive lines, and the second conductive lines extend in the first direction. The memory structure vertically overlaps a first conductive line and a second conductive line. The memory structure includes an electrode structure, an insulation pattern on a central upper surface of the electrode structure, and a variable resistance pattern on an edge upper surface of the electrode structure. The variable resistance pattern at least partially covers a sidewall of the insulation pattern.

    Variable resistance memory device and method of manufacturing the same
    12.
    发明授权
    Variable resistance memory device and method of manufacturing the same 有权

    公开(公告)号：US10236444B2

    公开(公告)日：2019-03-19

    申请号：US15432346

    申请日：2017-02-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hideki Horii ,  Seong-Geon Park ,  Dong-Ho Ahn ,  Jung-Moo Lee

    IPC: H01L45/00 ,  H01L27/24

    Abstract: A variable resistance memory device includes first conductive lines positioned above a substrate. Each of the first conductive lines extends in a first direction and a second direction. Second conductive lines extend in the first direction and the second direction. The second conductive lines are positioned above the first conductive lines. A memory is positioned between the first and second conductive lines. The memory unit overlaps the first and second conductive lines in a third direction. The memory unit includes a first electrode, a variable resistance pattern positioned on the first electrode, and a second electrode positioned on the variable resistance pattern. A selection pattern is positioned on each memory unit. A third electrode is positioned above the selection pattern. The third electrode is in direct contact with a lower surface of each of the second conductive lines.

    Variable resistance memory device and method of forming the same
    15.
    发明授权
    Variable resistance memory device and method of forming the same 有权
    可变电阻存储器件及其形成方法

    公开(公告)号：US08962438B2

    公开(公告)日：2015-02-24

    申请号：US14032997

    申请日：2013-09-20

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jeonghee Park ,  Hideki Horii ,  Hyeyoung Park ,  Jin Ho Oh ,  Hyun-Suk Kwon

    IPC: H01L45/00 ,  H01L27/24

    CPC classification number: H01L45/16 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/1293 ,  H01L45/141 ,  H01L45/1683

    Abstract: Provided are a variable resistance memory device and a method of forming the same. The variable resistance memory device may include a substrate, a plurality of bottom electrodes on the substrate, and a first interlayer insulating layer including a trench formed therein. The trench exposes the bottom electrodes and extends in a first direction. The variable resistance memory device further includes a top electrode provided on the first interlayer insulating layer and extending in a second direction crossing the first direction and a plurality of variable resistance patterns provided in the trench and having sidewalls aligned with a sidewall of the top electrode.

    Abstract translation: 提供了一种可变电阻存储器件及其形成方法。 可变电阻存储器件可以包括衬底，在衬底上的多个底部电极，以及包括形成在其中的沟槽的第一层间绝缘层。 沟槽露出底部电极并沿第一方向延伸。 可变电阻存储器件还包括设置在第一层间绝缘层上并沿与第一方向交叉的第二方向延伸的顶电极和设置在沟槽中并具有与顶电极的侧壁对准的侧壁的多个可变电阻图案。

    Method of forming semiconductor devices having threshold switching devices
    17.
    发明授权
    Method of forming semiconductor devices having threshold switching devices 有权

    公开(公告)号：US10403818B2

    公开(公告)日：2019-09-03

    申请号：US15401474

    申请日：2017-01-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Min Kyu Yang ,  Seong Geon Park ,  Dong Jun Seong ,  Dong Ho Ahn ,  Jung Moo Lee ,  Seol Choi ,  Hideki Horii

    IPC: G11C13/00 ,  H01L27/24 ,  H01L45/00

    Abstract: Forming a semiconductor device that includes a memory cell array may include performing a switching firing operation on one or more memory cells of the memory array to cause a threshold voltage distribution associated with threshold switching devices in the memory cells to be reduced. The switching device firing operation may be performed such that the threshold voltage distribution is reduced while maintaining the one or more threshold switching devices in the amorphous state. Performing the switching device firing operation on a threshold switching device may include heating the threshold switching device, applying a voltage to the threshold switching device, applying a current to the threshold switching device, some combination thereof, or the like.

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