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公开(公告)号：US20180026077A1
公开(公告)日：2018-01-25
申请号：US15421498
申请日：2017-02-01
发明人： Zhe Wu , Dong-ho Ahn , Hideki Horii , Soon-oh Park , Jeong-hee Park , Jin-woo Lee , Dong-jun Seong , Seol Choi
CPC分类号： H01L27/2481 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/1675
摘要： A memory device includes a variable resistance layer and a selection device layer electrically connected to the variable resistance layer. The memory device further included a chalcogenide switching material that reduces leakage current and has, for example, a composition according to chemical formula 1 below, [GeXSiY(AsaTe1-a)Z](1-U)[N]U (1) (where 0.05≦X≦0.1, 0.15≦Y≦0.25, 0.7≦Z≦0.8, X+Y+Z=1, 0.45≦a≦0.6, and 0.08≦U≦0.2).
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公开(公告)号：US20170054075A1
公开(公告)日：2017-02-23
申请号：US15344772
申请日：2016-11-07
发明人： Hideki Horii , Jeonghee Park , Sugwoo Jung
CPC分类号： H01L45/1608 , H01L27/2436 , H01L27/2463 , H01L45/06 , H01L45/065 , H01L45/1233 , H01L45/1253 , H01L45/1273 , H01L45/141
摘要： Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a selection element, a lower electrode pattern provided on the selection element to include a horizontal portion and a vertical portion; and a phase-changeable pattern on the lower electrode pattern. The vertical portion may extend from the horizontal portion toward the phase-changeable pattern and have a top surface, whose area is smaller than that of a bottom surface of the phase-changeable pattern.
摘要翻译： 提供半导体器件及其制造方法。 半导体器件可以包括选择元件，设置在选择元件上以包括水平部分和垂直部分的下电极图案; 和在下电极图案上的相变图案。 垂直部分可以从水平部分向相变图案延伸，并且具有面积小于可相变图案底面的面积。
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公开(公告)号：US20160056376A1
公开(公告)日：2016-02-25
申请号：US14746039
申请日：2015-06-22
发明人： Hideki Horii , Jeonghee Park , Sugwoo Jung
CPC分类号： H01L45/1608 , H01L27/2436 , H01L27/2463 , H01L45/06 , H01L45/065 , H01L45/1233 , H01L45/1253 , H01L45/1273 , H01L45/141
摘要： Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a selection element, a lower electrode pattern provided on the selection element to include a horizontal portion and a vertical portion; and a phase-changeable pattern on the lower electrode pattern. The vertical portion may extend from the horizontal portion toward the phase-changeable pattern and have a top surface, whose area is smaller than that of a bottom surface of the phase-changeable pattern.
摘要翻译： 提供半导体器件及其制造方法。 半导体器件可以包括选择元件，设置在选择元件上以包括水平部分和垂直部分的下电极图案; 和在下电极图案上的相变图案。 垂直部分可以从水平部分向相变图案延伸，并且具有面积小于可相变图案底面的面积。
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公开(公告)号：US20190148456A1
公开(公告)日：2019-05-16
申请号：US16226855
申请日：2018-12-20
发明人： Zhe Wu , Dong-ho Ahn , Hideki Horii , Soon-oh Park , Jeong-hee Park , Jin-woo Lee , Dong-jun Seong , Seol Choi
CPC分类号： H01L27/2481 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/1675
摘要： A memory device includes a plurality of word lines extending along a first direction and spaced apart from each other along a second direction that is perpendicular to the first direction; a plurality of bit lines extending along the second direction and spaced apart from each other in the first direction, the plurality of bit lines being spaced apart from the plurality of word lines in a third direction that is perpendicular to both the first and second directions; and a plurality of memory cells being respectively arranged between the corresponding word and bit lines. Each of the memory cells includes a selection device layer, and a variable resistance layer, wherein the selection device layer includes a chalcogenide switching material having a composition according to a particular chemical formula.
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公开(公告)号：US20180277601A1
公开(公告)日：2018-09-27
申请号：US15832958
申请日：2017-12-06
发明人： Dong-ho Ahn , Zhe Wu , Soon-oh Park , Hideki Horii
CPC分类号： H01L27/2427 , H01L27/224 , H01L27/2436 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/065 , H01L45/1233 , H01L45/1246 , H01L45/126 , H01L45/141 , H01L45/143 , H01L45/144 , H01L45/146 , H01L45/1683
摘要： A memory device is provided. The memory device includes a variable resistance layer. A selection device layer is electrically connected to the variable resistance layer. The selection device layer includes a chalcogenide switching material having a composition according to chemical formula 1 below, [GeASeBTeC](1-U)[X]U (1) where 0.20≤A≤0.40, 0.40≤B≤0.70, 0.05≤C≤0.25, A+B+C=1, 0.0≤U≤0.20, and X is at least one selected from boron (B), carbon (C), nitrogen (N), oxygen (O), phosphorus (P), or sulfur (S).
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公开(公告)号：US09318700B2
公开(公告)日：2016-04-19
申请号：US14740929
申请日：2015-06-16
发明人： Zhe Wu , Jeong-Hee Park , Dong-Ho Ahn , Jung-Hwan Park , Jun-Ku Ahn , Sung-Lae Cho , Hideki Horii
CPC分类号： H01L45/06 , H01L27/2409 , H01L27/2463 , H01L45/1233 , H01L45/1253 , H01L45/141 , H01L45/144 , H01L45/1616 , H01L45/1625 , H01L45/1641 , H01L45/1666 , H01L45/1683
摘要： In a method of manufacturing a phase change memory device, an insulating interlayer having a through opening is formed on a substrate, at least one conformal phase change material layer pattern is formed along the sides of the opening, and a plug-like phase change material pattern having a composition different from that of each conformal phase change material layer pattern is formed on the at least one conformal phase change material layer pattern as occupying a remaining portion of the opening. Energy is applied to the phase change material layer patterns to form a mixed phase change material layer pattern including elements from the conformal and plug-like phase change material layer patterns.
摘要翻译： 在相变存储装置的制造方法中，在基板上形成具有通孔的绝缘中间层，沿开口侧形成至少一个共形相变材料层图案，并且形成插塞状相变材料 具有不同于每个共形相变材料层图案的组成的图案形成在占据开口的剩余部分的至少一个共形相变材料层图案上。 将能量施加到相变材料层图案以形成包括来自保形和插塞状相变材料层图案的元件的混合相变材料层图案。
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公开(公告)号：US11387410B2
公开(公告)日：2022-07-12
申请号：US16800123
申请日：2020-02-25
发明人： Jeonghee Park , Kwangmin Park , Jiho Park , Gyuhwan Oh , Jungmoo Lee , Hideki Horii
摘要： A semiconductor device includes a base structure comprising a semiconductor substrate, a first conductive structure disposed on the base structure, and extending in a first direction, the first conductive structure including lower layers, and at least one among the lower layers including carbon, and a data storage pattern disposed on the first conductive structure. The semiconductor device further includes an intermediate conductive pattern disposed on the data storage pattern, and including intermediate layers, at least one among the intermediate layers including carbon, a switching pattern disposed on the intermediate conductive pattern, and a switching upper electrode pattern disposed on the switching pattern, and including carbon. The semiconductor device further includes a second conductive structure disposed on the switching upper electrode pattern, and extending in a second direction intersecting the first direction, and a hole spacer disposed on a side surface of the data storage pattern.
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公开(公告)号：US10403681B2
公开(公告)日：2019-09-03
申请号：US15832958
申请日：2017-12-06
发明人： Dong-ho Ahn , Zhe Wu , Soon-oh Park , Hideki Horii
摘要： A memory device is provided. The memory device includes a variable resistance layer. A selection device layer is electrically connected to the variable resistance layer. The selection device layer includes a chalcogenide switching material having a composition according to chemical formula 1 below, [GeASeBTeC](1-U)[X]U (1) where 0.20≤A≤0.40, 0.40≤B≤0.70, 0.05≤C≤0.25, A+B+C=1, 0.0≤U≤0.20, and X is at least one selected from boron (B), carbon (C), nitrogen (N), oxygen (O), phosphorus (P), or sulfur (S).
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公开(公告)号：US10186552B2
公开(公告)日：2019-01-22
申请号：US15446024
申请日：2017-03-01
发明人： Seol Choi , Hideki Horii , Dong-ho Ahn , Seong-geon Park , Dong-jun Seong , Min-kyu Yang , Jung-moo Lee
摘要： A variable resistance memory device may include: a first electrode layer; a selection device layer on the first electrode layer, the selection device layer including a chalcogenide switching material consisting essentially of germanium (Ge), selenium (Se), and antimony (Sb), wherein a content of the Ge is less than a content of the Se based on an atomic weight; a second electrode layer on the selection device layer; a variable resistance layer on the second electrode layer, the variable resistance layer including a chalcogenide material; and a third electrode layer on the variable resistance layer.
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公开(公告)号：US10546894B2
公开(公告)日：2020-01-28
申请号：US16226855
申请日：2018-12-20
发明人： Zhe Wu , Dong-ho Ahn , Hideki Horii , Soon-oh Park , Jeong-hee Park , Jin-woo Lee , Dong-jun Seong , Seol Choi
摘要： A memory device includes a plurality of word lines extending along a first direction and spaced apart from each other along a second direction that is perpendicular to the first direction; a plurality of bit lines extending along the second direction and spaced apart from each other in the first direction, the plurality of bit lines being spaced apart from the plurality of word lines in a third direction that is perpendicular to both the first and second directions; and a plurality of memory cells being respectively arranged between the corresponding word and bit lines. Each of the memory cells includes a selection device layer, and a variable resistance layer, wherein the selection device layer includes a chalcogenide switching material having a composition according to a particular chemical formula.
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