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公开(公告)号：US20190319364A1
公开(公告)日：2019-10-17
申请号：US16379553
申请日：2019-04-09
Applicant: QUALCOMM Incorporated
Inventor： Taesik Yang , Jorge Fabrega Sanchez , Mohammad Ali Tassoudji , Kevin Hsi Huai Wang , Jeongil Kim
Abstract: Methods, systems, and devices for wireless communication are described. According to one or more aspects, the described apparatus includes one or more stacks of patch radiators (such as patch antennas) comprising at least a first patch radiator and a second patch radiator. The first patch radiator is associated with a low-band frequency; the second patch radiator is associated with a high-band frequency. The first patch radiator and the second patch radiator may overlap a ground plane, which may be asymmetric. Some or all patch radiators in a stack may be rotated relative to the ground plane, such that some or all edge of a patch radiator may be nonparallel with one or more edges of the ground plane. Further, each patch radiator stack may include separate feeds for each of at least two frequencies and two polarizations, and thus at least four feeds (one for each frequency/polarization combination) in total.
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公开(公告)号：US11862861B2
公开(公告)日：2024-01-02
申请号：US17653449
申请日：2022-03-03
Applicant: Qualcomm Incorporated
Inventor： Li Liu , Kevin Hsi Huai Wang , Yunfei Feng , Chuan Wang , Gurkanwal Sahota
CPC classification number: H01Q21/30 , H01Q5/35 , H04B1/18 , H04B1/44 , H01Q21/065
Abstract: An apparatus is disclosed for a hybrid wireless transceiver architecture that supports multiple antenna arrays. In an example aspect, the apparatus includes a first antenna array, a second antenna array, and a wireless transceiver. The wireless transceiver includes first dedicated circuitry dedicated to the first antenna array and second dedicated circuitry dedicated to the second antenna array. The wireless transceiver also includes shared circuitry that is shared with both the first antenna array and the second antenna array.
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公开(公告)号：US20220224022A1
公开(公告)日：2022-07-14
申请号：US17653449
申请日：2022-03-03
Applicant: Qualcomm Incorporated
Inventor： Li Liu , Kevin Hsi Huai Wang , Yunfei Feng , Chuan Wang , Gurkanwal Sahota
Abstract: An apparatus is disclosed for a hybrid wireless transceiver architecture that supports multiple antenna arrays. In an example aspect, the apparatus includes a first antenna array, a second antenna array, and a wireless transceiver. The wireless transceiver includes first dedicated circuitry dedicated to the first antenna array and second dedicated circuitry dedicated to the second antenna array. The wireless transceiver also includes shared circuitry that is shared with both the first antenna array and the second antenna array.
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公开(公告)号：US20190158048A1
公开(公告)日：2019-05-23
申请号：US16200405
申请日：2018-11-26
Applicant: Qualcomm Incorporated
Inventor： Alaaeldien Mohamed Abdelrazek Medra , David Zixiang Yang , Kevin Hsi Huai Wang , Chen Zhai , Francesco Gatta
CPC classification number: H03F9/02 , H03F1/223 , H03F1/565 , H03F3/195 , H03F2200/294
Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
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公开(公告)号：US10177722B2
公开(公告)日：2019-01-08
申请号：US15178529
申请日：2016-06-09
Applicant: QUALCOMM Incorporated
Inventor： Chuan Wang , Kevin Hsi Huai Wang , Chiewcharn Narathong , Mehmet Uzunkol , Prakash Thoppay Egambaram
Abstract: A device includes a low-noise amplifier (LNA) and a matching circuit. The matching circuit is coupled to an output of the LNA and switchably coupled to at least one of a first and a second output of the device. The device may further include a power splitter switchably coupled between an output of the matching circuit and the first and/or the second output of the device.
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Patent Agency Ranking
公开(公告)号：US09515749B2
公开(公告)日：2016-12-06
申请号：US14706917
申请日：2015-05-07
Applicant: QUALCOMM Incorporated
Inventor： Lai Kan Leung , Kevin Hsi Huai Wang , Dongling Pan , Chiewcharn Narathong
CPC classification number: H04B17/21 , H03F1/0205 , H03F1/0277 , H03F3/189 , H03F3/19 , H03F3/211 , H03F3/24 , H03F3/62 , H03F3/68 , H03F3/72 , H03F2200/111 , H03F2200/294 , H03F2200/451 , H03F2203/21106 , H03F2203/21142 , H03F2203/21145 , H04W24/02
Abstract: An amplifier module with an output coupler is disclosed. The amplifier module may include a plurality of input terminals and two or more output terminals. Each input terminal may be coupled to an input of an independent amplifier. Outputs from the independent amplifiers may be coupled to the two or more output terminals. The amplifier module may include an output coupler to couple the two or more output terminals together. A signal may be received by a first output terminal and be coupled by the output coupler to a second output terminal. In some embodiments, when the two or more output terminals are coupled together, the independent amplifiers may be made inactive or operated in a minimum gain configuration.
Abstract translation: 公开了具有输出耦合器的放大器模块。 放大器模块可以包括多个输入端子和两个或更多个输出端子。 每个输入端可以耦合到独立放大器的输入。 来自独立放大器的输出可以耦合到两个或更多个输出端子。 放大器模块可以包括输出耦合器以将两个或多个输出端子耦合在一起。 信号可以由第一输出端子接收并且由输出耦合器耦合到第二输出端子。 在一些实施例中，当两个或更多个输出端子耦合在一起时，独立放大器可以被制成无效或以最小增益配置运行。
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公开(公告)号：US09350392B2
公开(公告)日：2016-05-24
申请号：US13712607
申请日：2012-12-12
Applicant: QUALCOMM Incorporated
Inventor： I-Hsiang Lin , Zhijie Xiong , Seshagiri Krishnamoorthy , Jin-Su Ko , Prashanth Akula , Liang Zhao , Kevin Hsi Huai Wang , Desong Zhao
CPC classification number: H04B1/0064
Abstract: An RFIC configuration for reduced antenna trace loss is disclosed. In an exemplary embodiment, an apparatus includes a primary RFIC and a secondary RFIC that is configured to receive analog signals from at least two antennas. The secondary RFIC is configured to process selected analog signals received from at least one antenna to generate an analog output that is input to the primary RFIC.
Abstract translation: 公开了一种用于降低天线轨迹损耗的RFIC配置。 在示例性实施例中，装置包括主RFIC和辅助RFIC，其被配置为从至少两个天线接收模拟信号。 辅助RFIC被配置为处理从至少一个天线接收的所选模拟信号，以产生输入到主RFIC的模拟输出。
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公开(公告)号：US09130509B2
公开(公告)日：2015-09-08
申请号：US14105130
申请日：2013-12-12
Applicant: QUALCOMM Incorporated
Inventor： Yang Xu , Timothy Paul Pals , Kevin Hsi Huai Wang
CPC classification number: H03F3/04 , G01S19/21 , G01S19/34 , G01S19/36 , H03F1/02 , H03F1/223 , H03F1/3205 , H03F3/19 , H03F3/24 , H04B7/18513 , H04B2001/045 , Y02D70/1222 , Y02D70/142 , Y02D70/144 , Y02D70/146 , Y02D70/164 , Y02D70/446
Abstract: A device includes a low noise amplifier (LNA) for amplifying an input signal, with the LNA including a first transistor configured to receive the input signal, a second transistor configured to receive a bias current and forming a current mirror for the first transistor, and an operational amplifier (op amp) operative to generate a bias voltage for the first and second transistors to match operating points of the first and second transistors.
Abstract translation: 一种器件包括用于放大输入信号的低噪声放大器（LNA），其中LNA包括被配置为接收输入信号的第一晶体管，被配置为接收偏置电流并形成用于第一晶体管的电流镜的第二晶体管，以及 运算放大器（op amp），用于产生第一和第二晶体管的偏置电压以匹配第一和第二晶体管的工作点。
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公开(公告)号：US11245175B2
公开(公告)日：2022-02-08
申请号：US16145100
申请日：2018-09-27
Applicant: QUALCOMM Incorporated
Inventor： Seong Heon Jeong , Rajneesh Kumar , Mohammad Ali Tassoudji , Darryl Jessie , Gurkanwal Sahota , Kevin Hsi Huai Wang , Jeong Il Kim , Taesik Yang , Thomas Myers , Neil Burns , Julio Zegarra , Clinton James Wilber , Jordan Szabo
IPC: H01Q1/24 , H01Q1/22 , H01L25/065 , H01L23/28 , H01L23/552 , H01L23/64 , H01L23/66 , H01Q1/52 , H01Q9/06 , H01Q9/26 , H01Q21/28 , H01L23/31 , H01Q9/04
Abstract: An antenna module is described. The antenna module include a ground plane in a multilayer substrate. The antenna module also includes a mold on the multilayer substrate. The antenna module further includes a conductive wall separating a first portion of the mold from a second portion of the mold. The conductive wall is electrically coupled to the ground plane. A conformal shield may be placed on a surface of the second portion of the mold. The conformal shield is electrically coupled to the ground plane.
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公开(公告)号：US10700655B2
公开(公告)日：2020-06-30
申请号：US16200405
申请日：2018-11-26
Applicant: Qualcomm Incorporated
Inventor： Alaaeldien Mohamed Abdelrazek Medra , David Zixiang Yang , Kevin Hsi Huai Wang , Chen Zhai , Francesco Gatta
Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
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