公开(公告)号：US20190385825A1

公开(公告)日：2019-12-19

申请号：US16418274

申请日：2019-05-21

Applicant: Applied Materials, Inc.

Inventor： Jian WU ,  Wei LIU ,  Theresa Kramer GUARINI ,  Linlin WANG ,  Malcolm BEVAN ,  Lara HAWRYLCHAK

IPC: H01J37/32 ,  C23C26/00

Abstract: Embodiments described herein generally relate to a method and apparatus for fabricating a chamber component for a plasma process chamber. In one embodiment a chamber component used within a plasma processing chamber is provided that includes a metallic base material comprising a roughened non-planar first surface, wherein the roughened non-planar surface has an Ra surface roughness of between 4 micro-inches and 80 micro-inches, a planar silica coating formed over the roughened non-planar surface, wherein the planar silica coating has a surface that has an Ra surface roughness that is less than the Ra surface roughness of the roughened non-planar surface, a thickness between about 0.2 microns and about 10 microns, less than 1% porosity by volume, and contains less than 2E12 atoms/centimeters2 of aluminum.

公开(公告)号：US20240170268A1

公开(公告)日：2024-05-23

申请号：US18487432

申请日：2023-10-16

Applicant: Applied Materials, Inc.

Inventor： Tobin KAUFMAN-OSBORN ,  Hugo RIVERA ,  Wei LIU

IPC: H01J37/32

CPC classification number: H01J37/3299 ,  H01J37/3211 ,  H01J2237/327

Abstract: A plasma processing system is provided including a processing chamber, one or more optical emission spectroscopy (OES) systems, and a controller. The processing chamber includes a chamber body enclosing a processing volume. The chamber body includes one or more windows. The processing chamber further includes a substrate support in the processing volume, a coil positioned over the substrate support, and one or more actuators configured to move the coil. Each OES system is optically coupled to one of the one or more windows and each OES system having an optical component configured to perform OES measurements on a portion of the processing volume. The controller is configured to adjust a position of the one or more actuators to move the coil based on the OES measurements.

公开(公告)号：US20230369017A1

公开(公告)日：2023-11-16

申请号：US18199780

申请日：2023-05-19

Applicant: Applied Materials, Inc.

Inventor： Vladimir NAGORNY ,  Wei LIU ,  Rene GEORGE

IPC: H01J37/32

CPC classification number: H01J37/3211 ,  H01J37/3244 ,  H01J2237/332

Abstract: Embodiments of the present disclosure generally relate to inductively coupled plasma sources and plasma processing apparatus. In at least one embodiment, plasma source includes a first sidewall and a gas injection insert defining a plasma source interior volume. The gas injection insert includes a peripheral gas injection port, a second sidewall disposed concentric with the first sidewall, and a center gas injection port. The plasma source includes a first induction coil disposed proximate the first sidewall and disposed around the first sidewall. The plasma source includes a first radio frequency power generator coupled with the first induction coil. The plasma source includes a second induction coil disposed proximate the second sidewall and disposed around the second sidewall. The plasma source includes a second radio frequency power generator coupled with the second induction coil.

公开(公告)号：US20230245863A1

公开(公告)日：2023-08-03

申请号：US18131306

申请日：2023-04-05

Applicant: Applied Materials, Inc.

Inventor： Jian WU ,  Wei LIU ,  Theresa Kramer GUARINI ,  Linlin WANG ,  Malcolm BEVAN ,  Lara HAWRYLCHAK

IPC: H01J37/32 ,  C23C26/00

CPC classification number: H01J37/32495 ,  C23C26/00 ,  H01J37/32477

Abstract: Embodiments described herein generally relate to a method and apparatus for fabricating a chamber component for a plasma process chamber. In one embodiment a chamber component used within a plasma processing chamber is provided that includes a metallic base material comprising a roughened non-planar first surface, wherein the roughened non-planar surface has an Ra surface roughness of between 4 micro-inches and 80 micro-inches, a planar silica coating formed over the roughened non-planar surface, wherein the planar silica coating has a surface that has an Ra surface roughness that is less than the Ra surface roughness of the roughened non-planar surface, a thickness between about 0.2 microns and about 10 microns, less than 1% porosity by volume, and contains less than 2E12 atoms/centimeters2 of aluminum.

公开(公告)号：US20220301920A1

公开(公告)日：2022-09-22

申请号：US17832775

申请日：2022-06-06

Applicant: Applied Materials, Inc.

Inventor： Kin Pong LO ,  Vladimir NAGORNY ,  Wei LIU ,  Theresa Kramer GUARINI ,  Bernard L. HWANG ,  Malcolm J. BEVAN ,  Jacob ABRAHAM ,  Swayambhu Prasad BEHERA

IPC: H01L21/687 ,  H01J37/32 ,  C23C16/455 ,  H01L21/67 ,  C23C16/458

Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits and to apparatus for use within a substrate processing chamber to improve film thickness uniformity. More specifically, the embodiments of the disclosure relate to an edge ring. The edge ring may include an overhang ring.

公开(公告)号：US20190157143A1

公开(公告)日：2019-05-23

申请号：US16260084

申请日：2019-01-28

Applicant: Applied Materials, Inc.

Inventor： Johanes S. SWENBERG ,  Wei LIU ,  Houda GRAOUI ,  Shashank SHARMA ,  Shankar MUTHUKRISHNAN ,  Rene GEORGE

IPC: H01L21/768 ,  H01L21/285

Abstract: Embodiments described herein generally relate to a sequential hydrogenation and nitridization process for reducing interfacial and bulk O atoms in a conductive structure in a semiconductor device. A hydrogenation and plasma nitridization process is performed on a metal nitride layer in a conductive structure prior to deposition of a second metal layer, thereby reducing interfacial oxygen atoms formed on a surface of the metal nitride and oxygen atoms present in the bulk metal layers of the conductive structure. As a result, adhesion of the second metal layer to the metal nitride layer is improved and the electrical resistance of the contact structure is reduced.

公开(公告)号：US20190115219A1

公开(公告)日：2019-04-18

申请号：US16159461

申请日：2018-10-12

Applicant: Applied Materials, Inc.

Inventor： Johanes S. SWENBERG ,  Wei LIU ,  Houda GRAOUI ,  Shashank SHARMA

IPC: H01L21/28 ,  H01L29/45 ,  H01L21/285 ,  H01L21/02 ,  H01L21/321 ,  H01L21/324 ,  H01L29/40

CPC classification number: H01L21/28255 ,  H01L21/02186 ,  H01L21/0234 ,  H01L21/28512 ,  H01L21/28518 ,  H01L21/28575 ,  H01L21/3212 ,  H01L21/324 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76862 ,  H01L29/401 ,  H01L29/45 ,  H01L29/452

Abstract: Embodiments described herein generally relate to enable the formation of a metal gate structure with a reduced effective oxide thickness over a similar structure formed via conventional methods. A plasma hydrogenation process followed by a plasma nitridization process is performed on a metal nitride layer in a film stack, thereby removing oxygen atoms disposed within layers of the film stack and, in some embodiments eliminating an oxygen-containing interfacial layer disposed within the film stack. As a result, an effective oxide thickness of the metal gate structure is reduced with little or no accompanying flatband voltage shift. Further, the metal gate structure operates with an increased leakage current that is as little as one quarter the increase in leakage current associated with a similar metal gate structure formed via conventional techniques.

公开(公告)号：US20180033619A1

公开(公告)日：2018-02-01

申请号：US15417473

申请日：2017-01-27

Applicant: Applied Materials, Inc.

Inventor： Wei LIU ,  Linlin WANG

IPC: H01L21/02 ,  H01L21/28

CPC classification number: H01L21/02321 ,  H01L21/02186 ,  H01L21/0228 ,  H01L21/0234 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/3105 ,  H01L29/517 ,  H01L29/518

Abstract: Embodiments of the present disclosure generally relate to methods for forming a dielectric material on a substrate, and more specifically, to methods for forming a high-k dielectric layer in an electronic device. In one embodiment, the method includes depositing a high-k dielectric layer on a substrate and fluorinating the deposited high-k dielectric layer. The fluorinating the high-k dielectric layer includes exposing the high-k dielectric layer to a fluorine containing plasma at temperature between about 200 degrees Celsius and about 550 degrees Celsius. At this temperature range, the fluorine radicals form fluorine bonds at the interface between the high-k dielectric layer and the substrate without etching any materials.

公开(公告)号：US20160276162A1

公开(公告)日：2016-09-22

申请号：US15071479

申请日：2016-03-16

Applicant: Applied Materials, Inc.

Inventor： Wei LIU ,  Abhilash J. MAYUR ,  Phillip STOUT

IPC: H01L21/3065 ,  H01L21/67 ,  H01L21/687 ,  H01L21/02

CPC classification number: H01L21/3065 ,  H01L21/02167 ,  H01L21/0228 ,  H01L21/02321 ,  H01L21/02332 ,  H01L21/0234 ,  H01L21/3115 ,  H01L21/67109 ,  H01L21/67115 ,  H01L21/67248 ,  H01L21/68771

Abstract: Embodiments described herein relate to methods for forming or treating material layers on semiconductor substrates. In one embodiment, a method for performing an atomic layer process includes delivering a species to a surface of a substrate at a first temperature, followed by spike annealing the surface of the substrate to a second temperature to cause a reaction between the species and the molecules on the surface of the substrate. The second temperature is higher than the first temperature. By repeating the delivering and spike annealing processes, a conformal layer is formed on the surface of the substrate or a conformal etching process is performed on the surface of the substrate.

Abstract translation: 本文所述的实施例涉及在半导体衬底上形成或处理材料层的方法。 在一个实施例中，用于执行原子层过程的方法包括在第一温度下将物质输送到衬底的表面，随后将衬底的表面尖峰退火到第二温度以引起物质和分子之间的反应 在基板的表面上。 第二温度高于第一温度。 通过重复输送和尖峰退火处理，在基板的表面上形成保形层，或者在基板的表面上执行保形蚀刻工艺。

公开(公告)号：US20240170261A1

公开(公告)日：2024-05-23

申请号：US17991651

申请日：2022-11-21

Applicant: Applied Materials, Inc.

Inventor： Vladimir NAGORNY ,  Rene GEORGE ,  Wei LIU

IPC: H01J37/32

CPC classification number: H01J37/32385 ,  H01J37/32348 ,  H01J37/32568

Abstract: Embodiments of the present disclosure generally relate to a plasma processing apparatus. The plasma processing apparatus includes a processing chamber including a substrate support operable to hold a substrate, a main plasma source coupled with the processing chamber, a plate, a cavity, and an edge plasma generator. The cavity is housed within the plate and spaced radially outward from a dielectric sidewall of the main plasma source.