公开(公告)号：US11171045B2

公开(公告)日：2021-11-09

申请号：US16401133

申请日：2019-05-02

Applicant: Applied Materials, Inc.

Inventor： Yu Lei ,  Sang-Hyeob Lee ,  Chris Pabelico ,  Yi Xu ,  Tae Hong Ha ,  Xianmin Tang ,  Jin Hee Park

IPC: H01L21/768 ,  H01L21/02

Abstract: Apparatuses and methods to provide electronic devices having metal films are provided. Some embodiments of the disclosure utilize a metallic tungsten layer as a liner that is filled with a metal film comprising cobalt. The metallic tungsten layer has good adhesion to the cobalt leading to enhanced cobalt gap-fill performance.

公开(公告)号：US10892186B2

公开(公告)日：2021-01-12

申请号：US16159128

申请日：2018-10-12

Applicant: Applied Materials, Inc.

Inventor： Ben-Li Sheu ,  Feng Q. Liu ,  Tae Hong Ha ,  Mei Chang ,  Shirish Pethe

IPC: H01L21/768 ,  C23C16/34 ,  C23C16/455 ,  C23C16/44 ,  C23C14/34 ,  C23C16/04 ,  C23C14/04 ,  C23C14/02 ,  C23C16/18 ,  C23C14/14

Abstract: Methods and apparatus to fill a feature with a seamless gapfill of copper are described. A copper gapfill seed layer is deposited on a substrate surface by atomic layer deposition followed by a copper deposition by physical vapor deposition to fill the gap with copper.

公开(公告)号：US10714388B2

公开(公告)日：2020-07-14

申请号：US16222630

申请日：2018-12-17

Applicant: APPLIED MATERIALS, INC.

Inventor： Jin Hee Park ,  Tae Hong Ha ,  Sang-Hyeob Lee ,  Thomas Jongwan Kwon ,  Jaesoo Ahn ,  Xianmin Tang ,  Er-Xuan Ping ,  Sree Kesapragada

IPC: H01L21/768 ,  H01L21/285 ,  C23C16/48 ,  C23C16/455 ,  C23C16/04 ,  C23C16/16 ,  C23C16/18 ,  C23C16/56 ,  H01L21/67 ,  H01L23/532 ,  H01L27/11556 ,  H01L27/11582

Abstract: Methods and apparatus for depositing a cobalt layer in a feature, such as, a word line formed in a substrate, are provided herein. In some embodiments, method of processing a substrate includes: exposing a substrate at a first temperature to a cobalt containing precursor to deposit a cobalt layer within a word line feature formed in the substrate, wherein the word line feature is part of a 3D NAND device; and annealing the substrate to remove contaminants from the cobalt layer and to reflow the cobalt layer into the word line feature, wherein the substrate is at a second temperature greater than the first temperature during the annealing.

公开(公告)号：US11562909B2

公开(公告)日：2023-01-24

申请号：US16881145

申请日：2020-05-22

Applicant: Applied Materials, Inc.

Inventor： Yu Lei ,  Xuesong Lu ,  Tae Hong Ha ,  Xianmin Tang ,  Andrew Nguyen ,  Tza-Jing Gung ,  Philip A. Kraus ,  Chung Nang Liu ,  Hui Sun ,  Yufei Hu

IPC: H01L21/67 ,  H01L21/311 ,  H01L21/02 ,  H01J37/32 ,  H01L21/683 ,  H01L21/3105 ,  H01L21/8234

Abstract: Described is a process to clean up junction interfaces for fabricating semiconductor devices involving forming low-resistance electrical connections between vertically separated regions. An etch can be performed to remove silicon oxide on silicon surface at the bottom of a recessed feature. Described are methods and apparatus for etching up the bottom oxide of a hole or trench while minimizing the effects to the underlying epitaxial layer and to the dielectric layers on the field and the corners of metal gate structures. The method for etching features involves a reaction chamber equipped with a combination of capacitively coupled plasma and inductive coupled plasma. CHxFy gases and plasma are used to form protection layer, which enables the selectively etching of bottom silicon dioxide by NH3—NF3 plasma. Ideally, silicon oxide on EPI is removed to ensure low-resistance electric contact while the epitaxial layer and field/corner dielectric layers are—etched only minimally or not at all.

公开(公告)号：US11527437B2

公开(公告)日：2022-12-13

申请号：US17022058

申请日：2020-09-15

Applicant: APPLIED MATERIALS, INC.

Inventor： Lanlan Zhong ,  Fuhong Zhang ,  Gang Shen ,  Feng Chen ,  Rui Li ,  Xiangjin Xie ,  Tae Hong Ha ,  Xianmin Tang

IPC: H01L21/768 ,  G11B5/31 ,  C23C16/455

Abstract: Methods and apparatus for filling features on a substrate are provided herein. In some embodiments, a method of filling features on a substrate includes: depositing a first metallic material on the substrate and within a feature disposed in the substrate in a first process chamber via a chemical vapor deposition (CVD) process at a first temperature; depositing a second metallic material on the first metallic material in a second process chamber at a second temperature and at a first bias power to form a seed layer of the second metallic material; etching the seed layer in the second process chamber at a second bias power greater than the first bias power to form an intermix layer within the feature comprising the first metallic material and the second metallic material; and heating the substrate to a third temperature greater than the second temperature, causing a reflow of the second metallic material.

公开(公告)号：US20220328348A1

公开(公告)日：2022-10-13

申请号：US17853150

申请日：2022-06-29

Applicant: Applied Materials, Inc.

Inventor： Rui Li ,  Xiangjin Xie ,  Tae Hong Ha ,  Xianmin Tang ,  Lu Chen

IPC: H01L21/768 ,  C23C16/455 ,  C23C16/34

Abstract: Methods of forming copper interconnects are described. A doped tantalum nitride layer formed on a copper layer on a substrate has a first amount of dopant. The doped tantalum nitride layer is exposed to a plasma comprising one or more of helium or neon to form a treated doped tantalum nitride layer with a decreased amount of dopant. Apparatus for performing the methods are also described.

公开(公告)号：US11424132B2

公开(公告)日：2022-08-23

申请号：US16590755

申请日：2019-10-02

Applicant: APPLIED MATERIALS, INC.

Inventor： Takashi Kuratomi ,  Avgerinos Gelatos ,  Tae Hong Ha ,  Xuesong Lu ,  Szuheng Ho ,  Wei Lei ,  Mark Lee ,  Raymond Hung ,  Xianmin Tang

IPC: H01L21/3205 ,  H01L21/285 ,  H01L21/02 ,  H01L21/321 ,  C23C16/02 ,  H01L21/768 ,  C23C16/455 ,  C23C16/06 ,  C23C16/34 ,  C23C14/06 ,  C23C16/56

Abstract: Methods and apparatus for producing a reduced contact resistance for cobalt-titanium structures. In some embodiments, a method comprises depositing a titanium layer using a chemical vapor deposition (CVD) process, depositing a titanium nitride layer on the titanium layer using an atomic layer deposition (ALD) process, depositing a first cobalt layer on the titanium nitride layer using a physical vapor deposition (PVD) process, and depositing a second cobalt layer on the first cobalt layer using a CVD process.

公开(公告)号：US20220064784A1

公开(公告)日：2022-03-03

申请号：US17011667

申请日：2020-09-03

Applicant: Applied Materials, Inc.

Inventor： Wenjing Xu ,  Gang Shen ,  Yufei Hu ,  Feng Chen ,  Tae Hong Ha

IPC: C23C16/18 ,  H01L21/285 ,  H01L21/02 ,  C23C16/02

Abstract: Methods for selective deposition are described herein. Further, methods for improving selectivity comprising an ammonia plasma pre-clean process are also described. In some embodiments, a silyl amine is used to selectively form a surfactant layer on a dielectric surface. A ruthenium film may then be selectively deposited on a conductive surface. In some embodiments, the ammonia plasma removes oxide contaminations from conductive surfaces without adversely affecting the dielectric surface.

公开(公告)号：US20210351136A1

公开(公告)日：2021-11-11

申请号：US16909148

申请日：2020-06-23

Applicant: Applied Materials, Inc.

Inventor： Gang Shen ,  Feng Chen ,  Yizhak Sabba ,  Tae Hong Ha ,  Xianmin Tang ,  Zhiyuan Wu ,  Wenjing Xu

IPC: H01L23/532 ,  H01L23/522 ,  H01L21/768

Abstract: Described are microelectronic device comprising a dielectric layer formed on a substrate, a feature 206 comprising a gap defined in the dielectric layer, a barrier layer on the dielectric layer, a two metal liner film on the barrier layer and a gap fill metal on the two metal liner. Embodiments provide a method of forming an microelectronic device comprising the two metal liner film on the barrier layer.

公开(公告)号：US20190115254A1

公开(公告)日：2019-04-18

申请号：US16159128

申请日：2018-10-12

Applicant: Applied Materials, Inc.

Inventor： Ben-Li Sheu ,  Feng Q. Liu ,  Tae Hong Ha ,  Mei Chang ,  Shirish Pethe

IPC: H01L21/768 ,  C23C16/34 ,  C23C16/44 ,  C23C16/455

Abstract: Methods and apparatus to fill a feature with a seamless gapfill of copper are described. A copper gapfill seed layer is deposited on a substrate surface by atomic layer deposition followed by a copper deposition by physical vapor deposition to fill the gap with copper.