公开(公告)号：US09385102B2

公开(公告)日：2016-07-05

申请号：US13630912

申请日：2012-09-28

Applicant: STATS ChipPAC, Ltd.

Inventor： Yaojian Lin ,  Kang Chen ,  Yu Gu

IPC: H01L23/02 ,  H01L23/48 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L23/498

CPC classification number: H01L23/3128 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/293 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/315 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/03

Abstract: A semiconductor device includes a semiconductor die. An encapsulant is formed around the semiconductor die. A build-up interconnect structure is formed over a first surface of the semiconductor die and encapsulant. A first supporting layer is formed over a second surface of the semiconductor die as a supporting substrate or silicon wafer disposed opposite the build-up interconnect structure. A second supporting layer is formed over the first supporting layer an includes a fiber enhanced polymer composite material comprising a footprint including an area greater than or equal to an area of a footprint of the semiconductor die. The semiconductor die comprises a thickness less than 450 micrometers (μm). The thickness of the semiconductor die is at least 1 μm less than a difference between a total thickness of the semiconductor device and a thickness of the build-up interconnect structure and the second supporting layer.

Abstract translation: 半导体器件包括半导体管芯。 在半导体管芯周围形成密封剂。 在半导体管芯和密封剂的第一表面上形成积聚互连结构。 第一支撑层形成在半导体管芯的第二表面上，作为与积聚互连结构相对设置的支撑衬底或硅晶片。 在第一支撑层上形成第二支撑层，包括纤维增强聚合物复合材料，其包括占地面积，该占地面积大于或等于半导体管芯的覆盖区域的面积。 半导体管芯的厚度小于450微米（μm）。 半导体管芯的厚度比半导体器件的总厚度和积层互连结构和第二支撑层的厚度之差小至少1μm。

公开(公告)号：US09379064B2

公开(公告)日：2016-06-28

申请号：US14697950

申请日：2015-04-28

Applicant: STATS ChipPAC, Ltd.

Inventor： JiHoon Oh ,  SinJae Lee ,  JinGwan Kim

IPC: H01L21/301 ,  H01L21/46 ,  H01L21/78 ,  H01L21/14 ,  H01L23/10 ,  H01L23/34 ,  H01L23/552 ,  H01L21/56 ,  H01L23/31 ,  H01L23/36 ,  H01L23/538 ,  H01L21/52 ,  H01L21/768 ,  H01L23/367 ,  H01L23/522 ,  H01L23/528 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/552 ,  H01L21/52 ,  H01L21/561 ,  H01L21/565 ,  H01L21/76877 ,  H01L21/76895 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/49816 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/19 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/24246 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/83005 ,  H01L2224/92244 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device is made by forming a heat spreader over a carrier. A semiconductor die is mounted over the heat spreader with a first surface oriented toward the heat spreader. A first insulating layer is formed over the semiconductor die and heat spreader. A via is formed in the first insulating layer. A first conductive layer is formed over the first insulating layer and connected to the heat spreader through the via and to contact pads on the semiconductor die. The heat spreader extends from the first surface of the semiconductor die to the via. A second insulating layer is formed over the first conductive layer. A second conductive layer is electrically connected to the first conductive layer. The carrier is removed. The heat spreader dissipates heat from the semiconductor die and provides shielding from inter-device interference. The heat spreader is grounded through the first conductive layer.

公开(公告)号：US12211808B2

公开(公告)日：2025-01-28

申请号：US18343606

申请日：2023-06-28

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HunTeak Lee ,  Choon Heung Lee ,  JunHo Ye

IPC: H01L23/66 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538 ,  H01L23/552 ,  H01Q1/22

Abstract: A semiconductor device has an electrical component assembly, and a plurality of discrete antenna modules disposed over the electrical component assembly. Each discrete antenna module is capable of providing RF communication for the electrical component assembly. RF communication can be enabled for a first one of the discrete antenna modules, while RF communication is disabled for a second one of the discrete antenna modules. Alternatively, RF communication is enabled for the second one of the discrete antenna modules, while RF communication is disabled for the first one of the discrete antenna modules. A bump is formed over the discrete antenna modules. An encapsulant is deposited around the discrete antenna modules. A shielding layer is formed over the electrical components assembly. A stud or core ball can be formed internal to a bump connecting the discrete antenna modules to the electrical component assembly.

公开(公告)号：US12211804B2

公开(公告)日：2025-01-28

申请号：US18429080

申请日：2024-01-31

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  KyoWang Koo ,  SungWon Cho ,  BongWoo Choi ,  JiWon Lee

IPC: H01L23/552 ,  H01L21/56 ,  H01L21/60 ,  H01L23/00 ,  H01L23/28 ,  H01L23/66 ,  H01L25/00

Abstract: A semiconductor device has a substrate. A first component and second component are disposed over the substrate. The first component includes an antenna. A lid is disposed over the substrate between the first component and second component. An encapsulant is deposited over the substrate and lid. A conductive layer is formed over the encapsulant and in contact with the lid. A first portion of the conductive layer over the first component is removed using laser ablation.

公开(公告)号：US20250023227A1

公开(公告)日：2025-01-16

申请号：US18902287

申请日：2024-09-30

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HunTeak Lee ,  KyoungHee Park ,  KyungHwan Kim ,  SeungHyun Lee ,  SangJun Park

IPC: H01Q1/22 ,  H01L21/56 ,  H01L23/31 ,  H01L23/36 ,  H01L23/498 ,  H01L23/552 ,  H01L25/16 ,  H01R12/71 ,  H05K1/18 ,  H05K3/34

Abstract: A semiconductor device has a PCB with an antenna and a semiconductor package mounted onto the PCB. An epoxy molding compound bump is formed or disposed over the PCB opposite the semiconductor package. A first shielding layer is formed over the PCB. A second shielding layer is formed over the semiconductor package. A board-to-board (B2B) connector is disposed on the PCB or as part of the semiconductor package. A conductive bump is disposed between the semiconductor package and PCB.

公开(公告)号：US20250006682A1

公开(公告)日：2025-01-02

申请号：US18740608

申请日：2024-06-12

Applicant: JCET Management Co., Ltd. ,  STATS ChipPAC Pte. Ltd.

Inventor： Zhan YING ,  Kai LIU ,  Yaqin WANG

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/373 ,  H01L23/498 ,  H01L25/065

Abstract: A semiconductor package comprise: a package substrate having a front surface and a rear surface, wherein the package substrate comprises: a set of front conductive patterns formed on the front surface; a set of rear conductive patterns formed on the rear surface; and a set of interconnects electrically coupling the set of front conductive patterns with the set of rear conductive patterns, respectively; at least one electronic component mounted on the front surface of the package substrate and electrically coupled to the set of front conductive patterns via a set of front solder balls; a set of rear solder balls electrically connected to the set of rear conductive patterns, respectively; wherein the set of front solder balls comprises one or more first-type solder balls and one or more second-type solder balls, and the set of rear solder balls comprises one or more first-type solder balls and one or more second-type solder balls; and wherein the first-type solder balls of the set of front solder balls are electrically coupled to the first-type solder balls of the set of rear solder balls.

公开(公告)号：US20250006585A1

公开(公告)日：2025-01-02

申请号：US18740630

申请日：2024-06-12

Applicant: JCET Management Co., Ltd. ,  STATS ChipPAC Pte. Ltd.

Inventor： Zhan YING ,  Kai LIU ,  Yaqin WANG

IPC: H01L23/373 ,  H01L23/00 ,  H01L25/18 ,  H10B80/00

Abstract: A semiconductor package comprises: a package substrate having a front surface and a rear surface, wherein the package substrate comprises: a plurality sets of front conductive patterns; a plurality sets of rear conductive patterns; and a plurality sets of interconnects electrically coupling the set of front conductive patterns with the set of rear conductive patterns, respectively; wherein the package substrate at least comprises a first thermal performance region and a second thermal performance region, wherein the first thermal performance region and the second thermal performance region have different thermal performances; a plurality sets of conductive components attached to the front surface and the rear surface of the package substrate and connected to the plurality sets of front conductive patterns and the plurality sets of rear conductive patterns, wherein the plurality sets of conductive components comprise: a set of first-type conductive components mounted to the first thermal performance region of the package substrate; and a set of second-type conductive components mounted to the second thermal performance region of the package substrate.

公开(公告)号：US20240387400A1

公开(公告)日：2024-11-21

申请号：US18646903

申请日：2024-04-26

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： JiSeon LEE ,  BumRyul MAENG ,  HyunKyu LEE

IPC: H01L23/552 ,  H01L21/56 ,  H01L23/14 ,  H01L23/31 ,  H01L23/528

Abstract: A semiconductor device and a method for making the same are provided. The method includes: providing a package including: a substrate having a front substrate surface and a back substrate surface, wherein the substrate includes a plurality of singulation areas separating the substrate into a plurality substrate units; a plurality of first electronic components mounted on the front substrate surface and within the plurality substrate units, respectively; and an encapsulant formed on the front substrate surface and encapsulating the plurality of first electronic components; forming a plurality of trenches at the plurality of singulation areas, respectively, wherein each of the plurality of trenches has a first portion extending through the encapsulant and a second portion extending through the encapsulant and the substrate; and forming an EMI shield to cover the encapsulant and lateral surfaces of the plurality of substrate units exposed by the second portions of the plurality of trenches.

公开(公告)号：US20240347373A1

公开(公告)日：2024-10-17

申请号：US18636304

申请日：2024-04-16

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： JongChan PARK ,  YoungMin KIM ,  GilHo LEE ,  HyeongKwan KIM ,  TaeKeun LEE

IPC: H01L21/687 ,  H01L21/68

CPC classification number: H01L21/68785 ,  H01L21/68

Abstract: A device for holding a package substrate is provided. The device comprises: a lower jig comprising a base material, and magnets embedded within the base material; and an upper jig comprising a frame and a grid pattern inside the frame, wherein the frame has a skirt portion that defines a gap between the lower jig and the grid pattern to accommodate the package substrate, and wherein the grid pattern is attractable by the magnets such that when the upper jig is placed on the lower jig to accommodate the package substrate the grid pattern is in contact with the package substrate to apply a pressure to the package substrate due to a magnetic interaction between the magnets and the grid pattern.

公开(公告)号：US20240343055A1

公开(公告)日：2024-10-17

申请号：US18619148

申请日：2024-03-27

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HyunSeok PARK ,  KyoWang KOO ,  SeongKuk KIM ,  SeokBeom HEO

IPC: B41N1/24 ,  B23K1/00 ,  B23K1/20 ,  B23K101/40 ,  B41C1/14 ,  B41M1/12 ,  B41M1/26 ,  G03F7/00 ,  H01L23/00

CPC classification number: B41N1/248 ,  B23K1/0016 ,  B23K1/203 ,  B41C1/148 ,  B41M1/12 ,  B41M1/26 ,  G03F7/0035 ,  H01L24/11 ,  H01L24/81 ,  B23K2101/40 ,  H01L2224/1147 ,  H01L2224/81815

Abstract: A selective stencil mask and a stencil printing method are provided. The stencil mask is for printing a fluid material onto a substrate, and comprises: a stencil member comprising: at least one printing region each having an array of apertures that allow the fluid material to flow therethrough and deposit onto the substrate; and a blocking region configured to prevent the fluid material from flowing therethrough; and a supporting member attached to the stencil member and configured to, when the stencil mask is placed on the substrate, contact the substrate and create a gap between the stencil member and the substrate.