公开(公告)号：US20070275559A1

公开(公告)日：2007-11-29

申请号：US11605128

申请日：2006-11-28

Applicant: Sung Hoon Lee

Inventor： Sung Hoon Lee

IPC: H01L21/302

CPC classification number: H01L27/115 ,  H01L27/11517 ,  H01L27/11519 ,  H01L27/11565

Abstract: A method of manufacturing a flash memory device which an etch-prevention layer, first and second interlayer insulating layers, and first, second and third hard mask layers are sequentially formed on a semiconductor substrate. The third hard mask layer is etched to expose a portion of a region on the second hard mask layer. A photoresist pattern of a line shape is formed on the entire surface such that the photoresist pattern is exposed to be narrower than the region through which the second hard mask layer is exposed. The second hard mask layer is etched using the photoresist pattern as a mask. The first hard mask layer is etched using the photoresist pattern as a mask, and the second and first interlayer insulating layers are then etched using the remaining third and second hard mask layers as masks, thus forming a drain contact hole having a square shape. The etch-prevention layer is etched using the remaining second and first hard mask layers as masks, thereby exposing a predetermined region of the semiconductor substrate and opening the drain contact hole. It is thus possible to improve a bridge occurring between the contacts.

Abstract translation: 一种在半导体衬底上依次形成防蚀层，第一和第二层间绝缘层以及第一，第二和第三硬掩模层的闪速存储器件的制造方法。 蚀刻第三硬掩模层以暴露第二硬掩模层上的区域的一部分。 在整个表面上形成线形的光致抗蚀剂图案，使得光致抗蚀剂图案暴露于比第二硬掩模层暴露的区域窄。 使用光致抗蚀剂图案作为掩模蚀刻第二硬掩模层。 使用光致抗蚀剂图案作为掩模蚀刻第一硬掩模层，然后使用剩余的第三和第二硬掩模层作为掩模来蚀刻第二和第一层间绝缘层，从而形成具有正方形形状的漏极接触孔。 使用剩余的第二和第一硬掩模层作为掩模蚀刻防蚀层，从而暴露半导体衬底的预定区域并打开漏极接触孔。 因此可以改善在触点之间发生的桥。

公开(公告)号：US20050269576A1

公开(公告)日：2005-12-08

申请号：US11144702

申请日：2005-06-06

Applicant: Noe-jung Park ,  Sung-hoon Lee ,  Hyo-sug Lee ,  Young-gu Jin

Inventor： Noe-jung Park ,  Sung-hoon Lee ,  Hyo-sug Lee ,  Young-gu Jin

IPC: H05B33/26 ,  H01L27/15 ,  H01L33/38 ,  H01L33/62 ,  H01L51/50 ,  H01L51/52

CPC classification number: H01L51/5203 ,  H01L33/382 ,  H01L33/62 ,  H01L51/5088 ,  H01L51/5092 ,  H01L51/5096 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A light-emitting device that improves the injection efficiency of electrons or holes by providing electrons or holes to an emitting layer using nano size needles, including a first electrode with a first polarity a second electrode with a second polarity opposite to the first polarity an emitting layer interposed between the first electrode and the second electrode to emit light and a plurality of conductive needles inserted in the first electrode and extending toward the emitting layer.

Abstract translation: 一种发光装置，其通过使用纳米尺寸针向发光层提供电子或空穴来提高电子或空穴的注入效率，所述纳米尺寸针包括具有第一极性的第一电极，具有与第一极性相反的第二极性的第二电极， 介于所述第一电极和所述第二电极之间以发射光的层;以及插入所述第一电极中并朝向所述发光层延伸的多个导电针。

公开(公告)号：US09105572B2

公开(公告)日：2015-08-11

申请号：US14203400

申请日：2014-03-10

Applicant: Hiroyuki Kanaya ,  Dong Jun Kim ,  Sung Hoon Lee

Inventor： Hiroyuki Kanaya ,  Dong Jun Kim ,  Sung Hoon Lee

IPC: H01L27/00 ,  H01L27/22 ,  H01L43/12 ,  G11C11/16 ,  G11C7/18

CPC classification number: H01L27/228 ,  G11C7/18 ,  G11C11/16 ,  G11C11/161 ,  H01L27/222 ,  H01L43/12

Abstract: According to one embodiment, a magnetic memory includes a cell transistor including a first source/drain diffusion layer and a second source/drain diffusion layer, a first contact on the first source/drain diffusion layer, a memory element on the first contact, and a second contact on the second source/drain diffusion layer, the second contact including a first plug on the second source/drain diffusion layer, and a second plug on the first plug.

Abstract translation: 根据一个实施例，磁存储器包括单元晶体管，其包括第一源极/漏极扩散层和第二源极/漏极扩散层，第一源极/漏极扩散层上的第一触点，第一触点上的存储元件，以及 在第二源/漏扩散层上的第二触点，第二触点包括在第二源极/漏极扩散层上的第一插头和第一插头上的第二插头。

公开(公告)号：US09093509B2

公开(公告)日：2015-07-28

申请号：US13242177

申请日：2011-09-23

Applicant: Jin-seong Heo ,  Sun-ae Seo ,  Sung-hoon Lee ,  Hyun-jong Chung ,  Hee-jun Yang

Inventor： Jin-seong Heo ,  Sun-ae Seo ,  Sung-hoon Lee ,  Hyun-jong Chung ,  Hee-jun Yang

IPC: H01L29/06 ,  H01L29/778 ,  H01L29/16

CPC classification number: H01L29/778 ,  H01L29/0657 ,  H01L29/1606

Abstract: A graphene electronic device includes a gate electrode, a gate oxide disposed on the gate electrode, a graphene channel layer formed on the gate oxide, and a source electrode and a drain electrode respectively disposed on both ends of the graphene channel layer. In the graphene channel layer, a plurality of nanoholes are arranged in a single line in a width direction of the graphene channel layer.

Abstract translation: 石墨烯电子器件包括栅电极，设置在栅电极上的栅极氧化物，形成在栅极氧化物上的石墨烯沟道层，以及分别设置在石墨烯沟道层两端的源电极和漏电极。 在石墨烯通道层中，多个纳米孔在石墨烯通道层的宽度方向上以单一线排列。

公开(公告)号：US08878240B2

公开(公告)日：2014-11-04

申请号：US13619918

申请日：2012-09-14

Applicant: Ji-Won Moon ,  Sung-Hoon Lee ,  Sook-Joo Kim

Inventor： Ji-Won Moon ,  Sung-Hoon Lee ,  Sook-Joo Kim

IPC: H01L45/00

CPC classification number: H01L45/08 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146

Abstract: A variable resistance memory device that includes a first electrode, a second electrode, a variable resistance layer interposed between the first electrode and a second electrode. A metal oxide electrode is interposed between the first electrode and the variable resistance layer, and the metal oxide electrode does not include a nitrogen constituent.

Abstract translation: 一种可变电阻存储器件，包括第一电极，第二电极，插在第一电极和第二电极之间的可变电阻层。 金属氧化物电极介于第一电极和可变电阻层之间，金属氧化物电极不包括氮成分。

公开(公告)号：US08610652B2

公开(公告)日：2013-12-17

申请号：US12458312

申请日：2009-07-08

Applicant: Sung-hoon Lee ,  Do-hyun Kim ,  Sang-wook Kim ,  Chang-jung Kim

Inventor： Sung-hoon Lee ,  Do-hyun Kim ,  Sang-wook Kim ,  Chang-jung Kim

IPC: G09G3/36

CPC classification number: G02F1/1368 ,  G09G3/3648 ,  G09G2330/027

Abstract: Provided are display apparatuses and methods of operating the same. In a display apparatus, a display image may be continuously held for longer than about 10 msec after the power of the display panel is turned off. The display apparatus may indicate a liquid crystal display (LCD) apparatus including an oxide thin film transistor (TFT). Off leakage current of the oxide TFT may be less than about 10−14 A.

Abstract translation: 提供了显示装置及其操作方法。 在显示装置中，在显示面板的电源关闭之后，显示图像可以连续保持超过约10毫秒。 显示装置可以指示包括氧化物薄膜晶体管（TFT）的液晶显示器（LCD）装置。 氧化物TFT的漏电流可以小于约10-14A。

公开(公告)号：US08552639B2

公开(公告)日：2013-10-08

申请号：US12292848

申请日：2008-11-26

Applicant: Mu-gyeom Kim ,  Sang-yeol Kim ,  Sung-hoon Lee ,  Jung-bae Song

Inventor： Mu-gyeom Kim ,  Sang-yeol Kim ,  Sung-hoon Lee ,  Jung-bae Song

IPC: H01L51/50

CPC classification number: H05B33/14 ,  H01L51/5036 ,  H01L51/5048 ,  H01L51/5265

Abstract: A white organic light emitting device (WOLED) includes electroluminescence (EL) red and blue light emitting layers disposed inside a cavity and a non-electroluminescence (NEL) green light emitting unit disposed outside the cavity or on a region inside the cavity where there are no combinations of electrons and holes. The green light emitting unit adjusts a green spectrum by resonating greenish blue light in the cavity, or is disposed on a path through which red and blue light output from the cavity travels and adapted to absorb the blue light and emit green light. A photoluminescence (PL) light emitting layer may be a capping layer covering the cavity. The capping layer functions as an optical path control layer controlling an optical path. A white spectrum is obtained by combining blue light and red light generated by EL and green generated by PL. This WOLED can operate at a low voltage.

Abstract translation: 白色有机发光器件（WOLED）包括设置在空腔内的电致发光（EL）红色和蓝色发光层，以及设置在空腔外部或空腔内部的区域内的非电致发光（NEL）绿色发光单元 没有电子和空穴的组合。 绿色发光单元通过使空腔中的绿色蓝色光共振而调节绿色光谱，或者设置在从空腔输出的红色和蓝色光通过的路径上，适于吸收蓝色光并发出绿色光。 光致发光（PL）发光层可以是覆盖空腔的覆盖层。 封盖层用作控制光路的光路控制层。 通过组合蓝色光和由EL产生的红色光和由PL生成的绿色获得白色光谱。 该WOLED可以在低电压下工作。

公开(公告)号：US08442102B2

公开(公告)日：2013-05-14

申请号：US12520935

申请日：2007-12-27

Applicant: Goon Seop Lee ,  Sung Hoon Lee ,  Jong Tae Ihm ,  Jae Hwang Yu ,  Dong Hahk Lee ,  Ku Ik Chung ,  Jin Hee Han

Inventor： Goon Seop Lee ,  Sung Hoon Lee ,  Jong Tae Ihm ,  Jae Hwang Yu ,  Dong Hahk Lee ,  Ku Ik Chung ,  Jin Hee Han

IPC: H03H7/30 ,  H03K5/159

CPC classification number: H04N7/20 ,  H04B1/7097 ,  H04B1/7115 ,  H04B2201/70715 ,  H04H40/90 ,  H04J13/004 ,  H04J13/0048 ,  H04L25/03038 ,  Y02D70/40

Abstract: A chip equalization apparatus and method for selecting cluster signals from broadcast signals being continuously received in multi-path channels for extracting a plurality of cluster signals from among the received broadcast signals and using a plurality of chip equalizers each having a tap coefficient update part for updating the tap coefficients of the selected cluster signals when the equalization outputs are combined to compensate the broadcast signals and provide low power consumption and efficient equalization for use in a satellite broadcasting receiving system.

Abstract translation: 一种芯片均衡装置和方法，用于从在多路径信道中连续接收的广播信号中选择簇信号，用于从接收的广播信号中提取多个聚类信号，并使用多个码片均衡器，每个码片均衡器具有用于更新的抽头系数更新部分 当均衡输出被组合以补偿广播信号并提供用于卫星广播接收系统的低功耗和高效均衡时，所选群集信号的抽头系数。

公开(公告)号：US08384439B2

公开(公告)日：2013-02-26

申请号：US12591701

申请日：2009-11-30

Applicant: Jae-chul Park ,  I-hun Song ,  Young-soo Park ,  Kee-won Kwon ,  Chang-jung Kim ,  Kyoung-kook Kim ,  Sung-ho Park ,  Sung-hoon Lee ,  Sang-wook Kim ,  Sun-il Kim

Inventor： Jae-chul Park ,  I-hun Song ,  Young-soo Park ,  Kee-won Kwon ,  Chang-jung Kim ,  Kyoung-kook Kim ,  Sung-ho Park ,  Sung-hoon Lee ,  Sang-wook Kim ,  Sun-il Kim

IPC: H01L25/00 ,  H03K19/00

CPC classification number: H01L29/7869 ,  H01L27/0207 ,  H01L27/11521 ,  H01L27/11807 ,  H01L27/1225 ,  H01L27/1251 ,  H01L29/41733 ,  H01L29/78648

Abstract: Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device may be a complementary device including a p-type oxide TFT and an n-type oxide TFT. The semiconductor device may be a logic device such as an inverter, a NAND device, or a NOR device.

Abstract translation: 提供半导体器件和制造半导体器件的方法。 半导体器件可以是包括p型氧化物TFT和n型氧化物TFT的互补器件。 半导体器件可以是诸如逆变器，NAND器件或NOR器件的逻辑器件。

公开(公告)号：US20120295297A1

公开(公告)日：2012-11-22

申请号：US13473901

申请日：2012-05-17

Applicant: Sunghoon KWON ,  Su Eun CHUNG ,  Sung Hoon LEE ,  Wook PARK ,  Young Hoon SONG ,  Ji Sung JANG ,  Hyoki KIM ,  Howon LEE

Inventor： Sunghoon KWON ,  Su Eun CHUNG ,  Sung Hoon LEE ,  Wook PARK ,  Young Hoon SONG ,  Ji Sung JANG ,  Hyoki KIM ,  Howon LEE

IPC: C12Q1/02 ,  G01N31/00

CPC classification number: G01N33/585 ,  G01N33/54313 ,  Y10T436/143333

Abstract: Provided is an assay method using an encoded particle-based platform. In the assay method, first, a plurality of encoded particles having codes distinguishable from one another according to kinds of included target materials are prepared. The plurality of encoded particles are provided onto a plate including a plurality of wells by pipetting, and disposed in the plurality of wells by a self-assembly method. An analyte is provided into the plurality of wells. The codes of the plurality of encoded particles disposed in the plurality of wells are decoded. The target materials of the plurality of encoded particles are released to cause a reaction between the target materials and the analyte.

Abstract translation: 提供了使用编码的基于粒子的平台的测定方法。 在测定方法中，首先，准备具有根据所包含的目标材料的种类彼此可区分的代码的多个编码粒子。 通过移液将多个编码粒子提供到包括多个孔的板上，并通过自组装方法设置在多个孔中。 分析物被提供到多个孔中。 解码设置在多个孔中的多个编码粒子的代码。 多个编码粒子的目标材料被释放以引起目标材料和分析物之间的反应。