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    MEMORY DEVICES AND METHODS FOR FORMING THE SAME
    1.
    发明申请
    MEMORY DEVICES AND METHODS FOR FORMING THE SAME 有权

    公开(公告)号：US20250151287A1

    公开(公告)日：2025-05-08

    申请号：US18604636

    申请日：2024-03-14

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Ku-Feng Lin ,  Ji-Kuan Lee ,  Wen-Chun You ,  Perng-Fei Yuh ,  Yi-Chun Shih ,  Yih Wang

    IPC: H10B63/00 ,  H10B53/30

    Abstract: A memory device includes a memory array comprising a plurality of memory cells arranged over a plurality of rows, the rows including a plurality of word lines, respectively, a first group of the memory cells coupled to an even-numbered one of the word lines and a second group of the memory cells coupled to an odd-numbered one of the word lines. The even-numbered word line is disposed in a first one of a plurality of metallization layers formed vertically above a substrate, wherein the even-numbered word line extends along a first lateral direction and includes a first stitch portion extending in a second lateral direction perpendicular to the first lateral direction. The odd-numbered word line is disposed in a second one of the plurality of metallization layers, wherein the odd-numbered word line extends along the first lateral direction and includes a second stitch portion extending in the second lateral direction.

    MEMORY DEVICES WITH DUAL-SIDE ACCESS CIRCUITS AND METHODS FOR OPERATING THE SAME
    2.
    发明申请
    MEMORY DEVICES WITH DUAL-SIDE ACCESS CIRCUITS AND METHODS FOR OPERATING THE SAME 有权

    公开(公告)号：US20250111869A1

    公开(公告)日：2025-04-03

    申请号：US18405940

    申请日：2024-01-05

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Tung-Cheng Chang ,  Yu-Fan Lin ,  Ku-Feng Lin ,  Perng-Fei Yuh ,  Yih Wang

    IPC: G11C11/16

    Abstract: A memory circuit includes a memory array comprising a plurality of non-volatile memory cells, wherein the non-volatile memory cells are arranged along a plurality of access lines that extend along a lateral direction. The memory circuit includes a first access circuit physically disposed on a first side of the memory array in the lateral direction. The memory circuit includes a second access circuit physically disposed on a second side of the memory array in the lateral direction, the second side being opposite to the first side. When each of the non-volatile memory cells is configured to be programmed by at least a first current and a second current, the first current and second current flow through a first path and a second path, respectively. The first path at least comprises a portion on the first side and the second path at least comprises a portion on the second side.

    SENSING AMPLIFIER, METHOD AND CONTROLLER FOR SENSING MEMORY CELL
    4.
    发明公开
    SENSING AMPLIFIER, METHOD AND CONTROLLER FOR SENSING MEMORY CELL 审中-公开

    公开(公告)号：US20240321325A1

    公开(公告)日：2024-09-26

    申请号：US18679395

    申请日：2024-05-30

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Hiroki Noguchi ,  Ku-Feng Lin ,  Yih Wang

    IPC: G11C7/06

    CPC classification number: G11C7/062

    Abstract: A sensing amplifier, coupled to at least one memory cell, includes an output terminal and a reference terminal, a multiplexer circuit, and a plurality of reference cells having equal value. An output terminal of the multiplexer circuit is coupled to the reference terminal of the sensing amplifier. Each of the reference cell is coupled to each input node of the multiplexer circuit. The multiplexer circuit is controlled by a control signal to select one of the reference cells as a selected reference cell to couple to the reference terminal of the sensing amplifier when each read operation to the at least one memory cell is performed. The plurality of reference cells are selected sequentially and repeatedly, and the one of the reference cells is selected for one read operation to the at least one memory cell.

    Dynamic error monitor and repair
    8.
    发明授权
    Dynamic error monitor and repair 有权

    公开(公告)号：US11380415B2

    公开(公告)日：2022-07-05

    申请号：US17130250

    申请日：2020-12-22

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Hiroki Noguchi ,  Ku-Feng Lin ,  Yih Wang

    IPC: G11C29/00 ,  G11C29/42 ,  G11C29/20 ,  G11C29/24 ,  G11C29/44

    Abstract: A memory device includes: a memory cell array comprising a plurality of memory cells, the plurality of memory cells comprising a plurality of data memory cells including a first data memory cell and a plurality of backup memory cells including a first backup memory cell; a storage storing an error table configured to record errors in the plurality of data memory cells, the error table including a plurality of error table entries, each error table entry corresponding to one of the plurality of data memory cell and having an address and a failure count; and a controller configured to replace the first data memory cell with the first backup memory cell based on the error table.

    MEMORY DEVICE, SENSE AMPLIFIER AND METHOD FOR MISMATCH COMPENSATION
    9.
    发明申请
    MEMORY DEVICE, SENSE AMPLIFIER AND METHOD FOR MISMATCH COMPENSATION 有权

    公开(公告)号：US20220101890A1

    公开(公告)日：2022-03-31

    申请号：US17035609

    申请日：2020-09-28

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Ku-Feng Lin

    IPC: G11C7/06

    Abstract: A memory device that includes a first memory cell, a second memory cell and a sense amplifier. The sense amplifier includes a first branch and a second branch and are configured to output a first voltage and a second voltage to the first memory and the second memory, respectively in a trimming operation. A first clamp device of the sense amplifier includes a first clamp transistor and a plurality of first trimming transistors that are coupled to the first clamp transistor in parallel. The gate terminals of the first clamp transistor and the plurality of first trimming transistors are biased by a fixed clamp voltage. Each of the plurality of first trimming transistors is selectively conducted to compensate a mismatch between the first voltage and the second voltage.

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