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    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
    2.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 有权

    公开(公告)号：US20220262814A1

    公开(公告)日：2022-08-18

    申请号：US17738516

    申请日：2022-05-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yong-Hoon SON ,  Hyung Joon KIM ,  Hyun Jung LEE

    IPC: H01L27/11565 ,  H01L27/108

    Abstract: Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory device comprises a first semiconductor pattern that is on a substrate and that includes a first end and a second end that face each other, a first conductive line that is adjacent to a lateral surface of the first semiconductor pattern between the first and second ends and that is perpendicular to a top surface of the substrate, a second conductive line that is in contact with the first end of the first semiconductor pattern, is spaced part from the first conductive line, and is parallel to the top surface of the substrate, and a data storage pattern in contact with the second end of the first semiconductor pattern. The first conductive line has a protrusion that protrudes adjacent to the lateral surface of the first semiconductor pattern.

    THREE DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    4.
    发明申请
    THREE DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20220093642A1

    公开(公告)日：2022-03-24

    申请号：US17540688

    申请日：2021-12-02

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Eun Yeoung CHOI ,  Hyung Joon KIM ,  Su Hyeong LEE ,  Yong Seok CHO

    IPC: H01L27/11582 ,  H01L27/11556

    Abstract: A semiconductor device includes a plurality of first gate electrodes sequentially stacked on a substrate, a second gate electrode on the plurality of first gate electrodes, a first channel structure extending through the plurality of first gate electrodes and a portion of the second gate electrode, a buried insulation pattern on a sidewall of the first channel structure, of which an upper surface is at a higher level than a top end of the first channel structure, a second channel structure extending through a remainder of the second gate electrode, the second channel structure connected to the first channel structure, and a buried conductive pattern on a sidewall of the second channel structure.

    SEMICONDUCTOR DEVICES
    7.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20230052762A1

    公开(公告)日：2023-02-16

    申请号：US17697423

    申请日：2022-03-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Teawon KIM ,  Hyung Joon KIM ,  Yong-Suk TAK ,  Yurim KIM ,  Kongsoo LEE

    IPC: H01L29/786 ,  H01L27/12 ,  H01L29/423

    Abstract: Disclosed is a semiconductor device comprising an oxide semiconductor layer on a substrate and including a first part and a pair of second parts that are spaced apart from each other across the first part, a gate electrode on the first part of the oxide semiconductor layer, and a pair of electrodes on corresponding second parts of the oxide semiconductor layer. A first thickness of the first part of the oxide semiconductor layer is less than a second thickness of each second part of the oxide semiconductor layer. A number of oxygen vacancies in the first part of the oxide semiconductor layer is less than a number of oxygen vacancies in each second part of the oxide semiconductor layer.

    VERTICAL-TYPE MEMORY DEVICE
    9.
    发明申请
    VERTICAL-TYPE MEMORY DEVICE 有权

    公开(公告)号：US20220028889A1

    公开(公告)日：2022-01-27

    申请号：US17495614

    申请日：2021-10-06

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Eun Yeoung CHOI ,  Hyung Joon KIM ,  Su Hyeong LEE ,  Jung Geun JEE

    IPC: H01L27/11582 ,  H01L29/10 ,  H01L29/16 ,  H01L21/768 ,  H01L21/02 ,  H01L21/28

    Abstract: A vertical-type memory device includes a plurality of gate electrodes stacked on a substrate; and a vertical channel structure penetrating through the plurality of gate electrodes in a first direction, perpendicular to an upper surface of the substrate. The vertical channel structure includes a channel extending in the first direction, a first filling film that partially fills an internal space of the channel, a first liner on at least a portion of an upper surface of the first filling film and an upper internal side wall of the channel extending beyond the first filling film away from the substrate. The first liner includes n-type impurities. The vertical channel structure includes a second filling film on at least a portion of the first liner, and a pad on the second filling film and in contact with the first liner.

    SEMICONDUCTOR DEVICE INCLUDING PARTIALLY ENLARGED CHANNEL HOLE
    10.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING PARTIALLY ENLARGED CHANNEL HOLE 审中-公开

    公开(公告)号：US20200350332A1

    公开(公告)日：2020-11-05

    申请号：US16930711

    申请日：2020-07-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Eunyeoung CHOI ,  Hyung Joon KIM ,  Bio KIM ,  Yujin KIM ,  Junggeun JEE

    IPC: H01L27/11582 ,  H01L23/532 ,  H01L27/1157

    Abstract: A semiconductor device includes a lower stack structure on a substrate, an upper stack structure on the lower stack structure, and a channel structure in a channel hole formed through the upper stack structure and the lower stack structure. The channel hole includes a lower channel hole in the lower stack structure, an upper channel hole in the upper stack structure, and a partial extension portion adjacent to an interface between the lower stack structure and the upper stack structure. The partial extension portion is in fluid communication with the lower channel hole and the upper channel hole. A lateral width of the partial extension portion may be greater than a lateral width of the upper channel hole adjacent to the partial extension portion and greater than a lateral width of the upper channel hole adjacent to the partial extension portion.

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