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公开(公告)号:US20240085282A1
公开(公告)日:2024-03-14
申请号:US18454381
申请日:2023-08-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Min Chul JO , Sang Hyun PARK , Su Jin SHIN , Gil Ho GU , Dae Gon YU , So Yeon LEE , Yun Bin JEONG
Abstract: There is provide a method for manufacturing analytical semiconductor samples by using an apparatus for manufacturing analytical semiconductor samples, which minimizes a feedback time by manufacturing a viewing surface that is environment-friendly and has a large area. The method comprising mounting the analytical semiconductor samples to a holder; discharging deionized (DI) water to an upper surface of a polishing plate through a DI water nozzle; grinding the analytical semiconductor samples with the upper surface of the polishing plat; determining whether a desired viewing surface of the analytical semiconductor samples has been acquired after the grinding of the analytical semiconductor samples; and transferring the analytical semiconductor samples to analyze the viewing surface of the ground analytical semiconductor samples based on a determination that the desired viewing surface of the analytical semiconductor samples has been acquired.
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公开(公告)号:US20180331119A1
公开(公告)日:2018-11-15
申请号:US16027667
申请日:2018-07-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jung Ho KIM , BiO KIM , Hyung Joon KIM , Young Seon SON , Su Jin SHIN , Jae Young AHN , Ju Mi YUN , HanMei CHOI
IPC: H01L27/11582 , H01L29/792 , H01L21/28 , H01L27/11568 , H01L27/11565
CPC classification number: H01L27/11582 , H01L27/11565 , H01L27/11568 , H01L29/40117 , H01L29/7926
Abstract: A semiconductor device includes gate electrodes vertically stacked on a substrate, and channel holes passing through the gate electrodes to extend perpendicularly to the substrate and including a gate dielectric layer and a channel area. The gate dielectric layer may be formed of a plurality of layers, and at least one layer among the plurality of layers may have different thicknesses in different locations.
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