公开(公告)号：US20230052762A1

公开(公告)日：2023-02-16

申请号：US17697423

申请日：2022-03-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Teawon KIM ,  Hyung Joon KIM ,  Yong-Suk TAK ,  Yurim KIM ,  Kongsoo LEE

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/423

Abstract: Disclosed is a semiconductor device comprising an oxide semiconductor layer on a substrate and including a first part and a pair of second parts that are spaced apart from each other across the first part, a gate electrode on the first part of the oxide semiconductor layer, and a pair of electrodes on corresponding second parts of the oxide semiconductor layer. A first thickness of the first part of the oxide semiconductor layer is less than a second thickness of each second part of the oxide semiconductor layer. A number of oxygen vacancies in the first part of the oxide semiconductor layer is less than a number of oxygen vacancies in each second part of the oxide semiconductor layer.

公开(公告)号：US20240057321A1

公开(公告)日：2024-02-15

申请号：US18338711

申请日：2023-06-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daejin NAM ,  Boreum LEE ,  Kongsoo LEE ,  Sunguk JANG

IPC: H10B12/00

CPC classification number: H10B12/482 ,  H10B12/315 ,  H10B12/485 ,  H10B12/02

Abstract: A semiconductor device may include a substrate including an active pattern, a conductive filling pattern on an impurity region at an upper portion of the active pattern, a first spacer and a second spacer stacked on a sidewall of the conductive filling pattern in a horizontal direction, and a bit line structure on the conductive filling pattern. The impurity region may include impurities. The horizontal direction may be parallel to an upper surface of the substrate. The first spacer may include an insulating material containing the impurities.

公开(公告)号：US20230137340A1

公开(公告)日：2023-05-04

申请号：US17858150

申请日：2022-07-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dohee KIM ,  Sunguk JANG ,  Sahwan HONG ,  Kongsoo LEE

IPC: H01L27/108

Abstract: A pattern formation method includes forming a first capping layer on a substrate, forming a recess that penetrates the first capping layer and an upper portion of the substrate, such that a non-penetrated portion of the first capping layer constitutes a first capping pattern, forming a second capping pattern that covers an inner sidewall of the recess, and forming a stack structure in the recess, such that the stack structure includes first stack patterns and second stack patterns that are alternately stacked, and the second capping pattern is between the substrate and a lateral surface of the stack structure.

公开(公告)号：US20160365279A1

公开(公告)日：2016-12-15

申请号：US15060641

申请日：2016-03-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jamin KOO ,  Youngseok KIM ,  Kongsoo LEE ,  Goeun BAE

IPC: H01L21/768 ,  H01L21/285

CPC classification number: H01L21/76895 ,  H01L21/28035 ,  H01L21/288 ,  H01L21/76831 ,  H01L21/76877 ,  H01L21/76897 ,  H01L23/53271 ,  H01L27/10888

Abstract: Provided is a method of fabricating a semiconductor device, the method including forming interconnection structures extending parallel to each other on a substrate; performing a coating process and forming a liquid state silicon source material layer filling an area between the interconnection structures; performing a first annealing process, curing the liquid state silicon source material layer, and forming an amorphous silicon layer; and crystallizing the amorphous silicon layer and forming contact plugs.

Abstract translation: 提供一种制造半导体器件的方法，该方法包括在衬底上形成彼此平行延伸的互连结构; 执行涂覆工艺并形成填充所述互连结构之间的区域的液态硅源材料层; 进行第一退火处理，固化液态硅源材料层，形成非晶硅层; 并使非晶硅层结晶并形成接触塞。

公开(公告)号：US20140183434A1

公开(公告)日：2014-07-03

申请号：US14064826

申请日：2013-10-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hanjin LIM ,  Wonseok YOO ,  Insang JEON ,  Seokwoo NAM ,  Kongsoo LEE ,  Jaejong HAN

IPC: H01L27/24 ,  H01L29/78 ,  H01L29/872

CPC classification number: H01L27/2463 ,  H01L21/2652 ,  H01L21/28518 ,  H01L21/76814 ,  H01L21/76834 ,  H01L23/485 ,  H01L27/2409 ,  H01L29/0847 ,  H01L29/167 ,  H01L29/401 ,  H01L29/456 ,  H01L29/8613 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1273 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor devices, and methods of fabricating the same, include a metal-containing layer on a semiconductor layer, and a barrier-lowering portion between the metal-containing layer and the semiconductor layer. The barrier-lowering portion lowers a Schottky barrier height between the metal-containing layer and the semiconductor layer below a Schottky barrier height between a metal silicide layer and the semiconductor layer.

Abstract translation: 半导体器件及其制造方法包括半导体层上的含金属层和金属含有层与半导体层之间的阻挡降低部。 阻挡降低部将金属含有层与半导体层之间的肖特基势垒高度降低到金属硅化物层与半导体层之间的肖特基势垒高度以下。