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    Nonvolatile semiconductor memory device and manufacturing method thereof
    1.
    发明授权
    Nonvolatile semiconductor memory device and manufacturing method thereof 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US08928062B2

    公开(公告)日：2015-01-06

    申请号：US12408796

    申请日：2009-03-23

    申请人： Naoki Yasuda

    发明人： Naoki Yasuda

    IPC分类号： H01L29/792 ,  H01L29/423 ,  H01L27/12 ,  H01L29/51 ,  H01L21/84 ,  H01L29/06 ,  H01L21/28 ,  H01L21/762

    CPC分类号： H01L29/792 ,  H01L21/28282 ,  H01L21/76243 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/0653 ,  H01L29/4234 ,  H01L29/513

    摘要： A nonvolatile semiconductor memory device includes a plurality of nonvolatile memory cells formed on a semiconductor substrate, each memory cell including source and drain regions separately formed on a surface portion of the substrate, buried insulating films formed in portions of the substrate that lie under the source and drain regions and each having a dielectric constant smaller than that of the substrate, a tunnel insulating film formed on a channel region formed between the source and drain regions, a charge storage layer formed of a dielectric body on the tunnel insulating film, a block insulating film formed on the charge storage layer, and a control gate electrode formed on the block insulating film.

    摘要翻译： 非易失性半导体存储器件包括形成在半导体衬底上的多个非易失性存储器单元，每个存储单元包括分别形成在衬底的表面部分上的源极和漏极区域，形成在衬底的位于源极的部分的掩埋绝缘膜 漏极区和介电常数小于衬底的介电常数，形成在源极和漏极区之间的沟道区上形成的隧道绝缘膜，在隧道绝缘膜上由电介质体形成的电荷存储层，块 形成在电荷存储层上的绝缘膜，以及形成在所述块绝缘膜上的控制栅电极。

    Nonvolatile semiconductor memory apparatus
    2.
    发明授权
    Nonvolatile semiconductor memory apparatus 有权
    非易失性半导体存储装置

    公开(公告)号：US08698313B2

    公开(公告)日：2014-04-15

    申请号：US13457054

    申请日：2012-04-26

    申请人： Izumi Hirano ,  Shosuke Fujii ,  Yuichiro Mitani ,  Naoki Yasuda

    发明人： Izumi Hirano ,  Shosuke Fujii ,  Yuichiro Mitani ,  Naoki Yasuda

    IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

    CPC分类号： H01L29/792 ,  H01L21/28282 ,  H01L29/4234 ,  H01L29/513

    摘要： A nonvolatile semiconductor memory apparatus according to an embodiment includes: a semiconductor layer; a first insulating film formed on the semiconductor layer, the first insulating film being a single-layer film containing silicon oxide or silicon oxynitride; a charge trapping film formed on the first insulating film; a second insulating film formed on the charge trapping film; and a control gate electrode formed on the second insulating film. A metal oxide exists in an interface between the first insulating film and the charge trapping film, the metal oxide comprises material which is selected from the group of Al2O3, HfO2, ZrO2, TiO2, and MgO, the material is stoichiometric composition, and the charge trapping film includes material different from the material of the metal oxide.

    摘要翻译： 根据实施例的非易失性半导体存储装置包括：半导体层; 形成在所述半导体层上的第一绝缘膜，所述第一绝缘膜是含有氧化硅或氮氧化硅的单层膜; 形成在第一绝缘膜上的电荷捕获膜; 形成在电荷捕获膜上的第二绝缘膜; 以及形成在所述第二绝缘膜上的控制栅电极。 金属氧化物存在于第一绝缘膜和电荷捕获膜之间的界面中，金属氧化物包括选自Al 2 O 3，HfO 2，ZrO 2，TiO 2和MgO的材料，该材料为化学计量组成，并且电荷 捕获膜包括与金属氧化物的材料不同的材料。

    Nonvolatile semiconductor memory apparatus
    4.
    发明授权
    Nonvolatile semiconductor memory apparatus 有权
    非易失性半导体存储装置

    公开(公告)号：US08154072B2

    公开(公告)日：2012-04-10

    申请号：US12403493

    申请日：2009-03-13

    申请人： Masahiro Koike ,  Yuichiro Mitani ,  Tatsuo Shimizu ,  Naoki Yasuda ,  Yasushi Nakasaki ,  Akira Nishiyama

    发明人： Masahiro Koike ,  Yuichiro Mitani ,  Tatsuo Shimizu ,  Naoki Yasuda ,  Yasushi Nakasaki ,  Akira Nishiyama

    IPC分类号： H01L29/788

    CPC分类号： H01L29/7881 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/11521 ,  H01L29/513

    摘要： A nonvolatile semiconductor memory apparatus includes: a source and drain regions formed at a distance from each other in a semiconductor layer; a first insulating film formed on the semiconductor layer located between the source region and the drain region, the first insulating film including a first insulating layer and a second insulating layer formed on the first insulating layer and having a higher dielectric constant than the first insulating layer, the second insulating layer having a first site performing hole trapping and releasing, the first site being formed by adding an element different from a base material to the second insulating film, the first site being located at a lower level than a Fermi level of a material forming the semiconductor layer; a charge storage film formed on the first insulating film; a second insulating film formed on the charge storage film; and a control gate electrode formed on the second insulating film.

    摘要翻译： 一种非易失性半导体存储器件，包括：在半导体层中形成为彼此间隔一定距离的源区和漏区; 形成在位于源极区域和漏极区域之间的半导体层上的第一绝缘膜，所述第一绝缘膜包括形成在所述第一绝缘层上并具有比所述第一绝缘层高的介电常数的第一绝缘层和第二绝缘层 所述第二绝缘层具有进行孔捕获和释放的第一部位，所述第一部位通过将不同于基材的元素添加到所述第二绝缘膜而形成，所述第一部位位于比所述第二绝缘膜的费米能级更低的水平 形成半导体层的材料; 形成在所述第一绝缘膜上的电荷存储膜; 形成在电荷存储膜上的第二绝缘膜; 以及形成在所述第二绝缘膜上的控制栅电极。

    Nonvolatile semiconductor memory device having insulating films that include multiple layers formed by insulating materials having d-orbital metal element and insulating materials without d-orbital metal element
    6.
    发明授权
    Nonvolatile semiconductor memory device having insulating films that include multiple layers formed by insulating materials having d-orbital metal element and insulating materials without d-orbital metal element 有权
    具有绝缘膜的非易失性半导体存储器件包括由具有d轨道金属元素的绝缘材料和不具有d轨道金属元素的绝缘材料形成的多个层

    公开(公告)号：US07989871B2

    公开(公告)日：2011-08-02

    申请号：US11680945

    申请日：2007-03-01

    申请人： Naoki Yasuda

    发明人： Naoki Yasuda

    IPC分类号： H01L29/788

    CPC分类号： H01L29/513 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/7881 ,  H01L29/792

    摘要： A nonvolatile semiconductor memory device includes a first insulating film on a channel, a floating gate electrode on the first insulating film, a second insulating film on the floating gate electrode, and a control gate electrode on the second insulating film. Each of the first and second insulating films comprises at least two layers, one layer directly in contact with the floating gate electrode is formed by an insulating material (A) including a metal element having a d orbital, and the other at least one layer is formed by an insulating material (B) chiefly including one of a metal element without the d orbital, and a semiconductor element.

    摘要翻译： 非易失性半导体存储器件包括沟道上的第一绝缘膜，第一绝缘膜上的浮栅，浮栅上的第二绝缘膜和第二绝缘膜上的控制栅电极。 第一绝缘膜和第二绝缘膜中的每一个包括至少两个层，与浮动栅极直接接触的一个层由包括具有轨道的金属元素的绝缘材料（A）形成，并且形成另一个层 通过主要包括没有d轨道的金属元素之一的绝缘材料（B）和半导体元件。

    Semiconductor device and method of fabricating the same
    7.
    发明授权
    Semiconductor device and method of fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号：US07981790B2

    公开(公告)日：2011-07-19

    申请号：US12683949

    申请日：2010-01-07

    申请人： Teruhiko Kumada ,  Hideharu Nobutoki ,  Naoki Yasuda ,  Kinya Goto ,  Masazumi Matsuura

    发明人： Teruhiko Kumada ,  Hideharu Nobutoki ,  Naoki Yasuda ,  Kinya Goto ,  Masazumi Matsuura

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/02271 ,  H01L21/314 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76835

    摘要： There is provided a semiconductor device and method of fabricating the same that employs an insulation film of a borazine-based compound to provided enhanced contact between a material for insulation and that for interconnection, increased mechanical strength, and other improved characteristics. The semiconductor device includes a first insulation layer having a recess with a first conductor layer buried therein, an etching stopper layer formed on the first insulation layer, a second insulation layer formed on the etching stopper layer, a third insulation layer formed on the second insulation layer, and a second conductor layer buried in a recess of the second and third insulation layers. The second and third insulation layers are grown by chemical vapor deposition with a carbon-containing borazine compound used as a source material and the third insulation layer is smaller in carbon content than the second insulation layer.

    摘要翻译： 提供一种半导体器件及其制造方法，其采用环硼氮烷化合物的绝缘膜，以提供绝缘材料和互连材料，增加的机械强度和其它改进的特性之间的增强的接触。 半导体器件包括具有埋设有第一导体层的凹部的第一绝缘层，形成在第一绝缘层上的蚀刻阻挡层，形成在蚀刻停止层上的第二绝缘层，形成在第二绝缘层上的第三绝缘层 层，以及埋在第二绝缘层和第三绝缘层的凹部中的第二导体层。 第二绝缘层和第三绝缘层通过化学气相沉积生长，其中含有碳源的环硼氮烷化合物用作源材料，第三绝缘层的碳含量比第二绝缘层小。

    MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, INSULATING FILM FOR SEMICONDUCTOR DEVICE, AND MANUFACTURING APPARATUS OF THE SAME
    9.
    发明申请
    MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, INSULATING FILM FOR SEMICONDUCTOR DEVICE, AND MANUFACTURING APPARATUS OF THE SAME 审中-公开
    半导体器件的制造方法，半导体器件的绝缘膜及其制造装置

    公开(公告)号：US20100181654A1

    公开(公告)日：2010-07-22

    申请号：US12664605

    申请日：2009-06-13

    申请人： Toshihito Fujiwara ,  Toshihiko Nishimori ,  Toshiya Watanabe ,  Naoki Yasuda ,  Hideharu Nobutoki ,  Teruhiko Kumada ,  Chiho Mizushima ,  Takuya Kamiyama ,  Tetsuya Yamamoto

    发明人： Toshihito Fujiwara ,  Toshihiko Nishimori ,  Toshiya Watanabe ,  Naoki Yasuda ,  Hideharu Nobutoki ,  Teruhiko Kumada ,  Chiho Mizushima ,  Takuya Kamiyama ,  Tetsuya Yamamoto

    IPC分类号： H01L23/58 ,  H01L21/471

    CPC分类号： H01L21/02118 ,  C23C16/342 ,  C23C16/505 ,  H01L21/02274 ,  H01L21/02348 ,  H01L21/02351 ,  H01L21/312 ,  H01L21/76801

    摘要： An object to provide an insulating film for a semiconductor device, which has characteristics of low permittivity, a low leak current, and high mechanical strength, undergoes small time-dependent change of these characteristics, and has excellent water resistance, and to provide a manufacturing apparatus of the same, and a manufacturing method of the semiconductor device using the insulating film. The production process comprises a film forming step of supplying a mixed gas containing a carrier gas and a raw material gas, which is a gasified material having borazine skeletal molecules, into a chamber, causing the mixed gas to be in a plasma state, applying a bias to the substrate placed in the chamber, and carrying out gas-phase polymerization by using the borazine skeletal molecule as a fundamental unit so as to form the insulating film on the substrate; and a reaction promoting step of, after the film forming step, bringing the bias applied to the substrate to a different magnitude from the bias in the film forming step, supplying the mixed gas while gradually reducing only the raw material gas, which is the gasified material having the borazine skeletal molecules, treating the insulating film with a plasma mainly comprising the carrier gas.

    摘要翻译： 提供具有低介电常数，低泄漏电流和高机械强度特性的半导体器件绝缘膜的目的是经历这些特性的小的时间依赖性变化，并且具有优异的耐水性，并且提供制造 以及使用该绝缘膜的半导体器件的制造方法。 制造方法包括：将含有载气的混合气体和作为具有环硼氮烷骨架分子的气化材料的原料气体供给到室中的成膜工序，使混合气体处于等离子体状态， 偏置于放置在室内的基板上，通过使用环硼氮烷骨架分子作为基本单元进行气相聚合，以在基板上形成绝缘膜; 以及反应促进步骤，在成膜步骤之后，使得施加到基板上的偏压与成膜步骤中的偏压大小不同，供给混合气体，同时逐渐减少气化的原料气体 具有环硼烷骨架分子的材料，以主要包含载气的等离子体处理绝缘膜。

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    10.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
    非易失性半导体存储器件

    公开(公告)号：US20090078990A1

    公开(公告)日：2009-03-26

    申请号：US12234126

    申请日：2008-09-19

    申请人： Naoki Yasuda

    发明人： Naoki Yasuda

    IPC分类号： H01L29/792

    CPC分类号： H01L29/792 ,  H01L21/28282 ,  H01L21/283 ,  H01L21/76224 ,  H01L23/528 ,  H01L27/10805 ,  H01L27/115 ,  H01L27/11568 ,  H01L27/1157 ,  H01L28/40 ,  H01L28/60 ,  H01L29/0649 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/4925 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/788 ,  H01L29/7881

    摘要： A nonvolatile semiconductor memory device includes a charge storage layer on a first insulating film, a second insulating film which is provided on the charge storage layer, formed of layers, and a control gate electrode on the second insulating film. The second insulating film includes a bottom layer (A) provided just above the charge storage layer, a top layer (C) provided just below the control gate electrode, and a middle layer (B) provided between the bottom layer (A) and the top layer (C). The middle layer (B) has higher barrier height and lower dielectric constant than both the bottom layer (A) and the top layer (C). The average coordination number of the middle layer (B) is smaller than both the average coordination number of the top layer (C) and the average coordination number of the bottom layer (A).

    摘要翻译： 非易失性半导体存储器件包括在第一绝缘膜上的电荷存储层，设置在电荷存储层上的由层构成的第二绝缘膜和在第二绝缘膜上的控制栅电极。 第二绝缘膜包括刚好位于电荷存储层上方的底层（A），设置在控制栅电极正下方的顶层（C）和设置在底层（A）和 顶层（C）。 中间层（B）具有比底层（A）和顶层（C）更高的势垒高度和更低的介电常数。 中间层（B）的平均配位数小于顶层（C）的平均配位数和底层（A）的平均配位数。