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1.发明申请公开(公告)号：US20150179609A1
公开(公告)日：2015-06-25
申请号：US14134680
申请日：2013-12-19
发明人： Michael Holm , Maurice Karpman , Matt Shea
IPC分类号： H01L25/065 , H01L21/3105 , H01L23/00 , H01L23/31 , H01L21/56 , H01L25/00
CPC分类号： H01L25/0655 , H01L21/56 , H01L21/568 , H01L23/3107 , H01L23/49811 , H01L23/5385 , H01L24/24 , H01L24/43 , H01L24/45 , H01L24/46 , H01L24/82 , H01L24/97 , H01L25/50 , H01L2224/04105 , H01L2224/05599 , H01L2224/18 , H01L2224/32225 , H01L2224/43 , H01L2224/4501 , H01L2224/45015 , H01L2224/4502 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/73267 , H01L2224/821 , H01L2224/92244 , H01L2224/97 , H01L2924/00014 , H01L2924/19107 , H01L2224/85399 , H01L2224/82 , H01L2924/20753
摘要： A method for interconnecting a die on a substrate of an electronic package. The method includes the steps of forming a plurality of free-end wire bonds on the die, wherein the free-end wire bonds are upstanding from the die, and encapsulating the free-end wire bonds in an encapsulation layer. Planarizing the encapsulation layer is performed so that the free-end wire bonds are exposed for electrical connection. Interconnecting the free-end wire bonds is provided by applying an interconnection layer on the encapsulation layer.
摘要翻译： 一种用于将电子封装的基板上的裸片互连的方法。 该方法包括以下步骤：在管芯上形成多个自由端引线键合，其中自由端引线键合从管芯直立，并将自由端引线键合封装在封装层中。 执行平坦化封装层，使得自由端引线接合被暴露用于电连接。 通过在封装层上施加互连层来提供互连自由端引线键合。
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公开(公告)号：US09293440B2
公开(公告)日：2016-03-22
申请号：US14134680
申请日：2013-12-19
发明人： Michael Holm , Maurice Karpman , Matt Shea
IPC分类号： H01L23/495 , H01L25/065 , H01L21/56 , H01L25/00 , H01L23/00 , H01L23/31
CPC分类号： H01L25/0655 , H01L21/56 , H01L21/568 , H01L23/3107 , H01L23/49811 , H01L23/5385 , H01L24/24 , H01L24/43 , H01L24/45 , H01L24/46 , H01L24/82 , H01L24/97 , H01L25/50 , H01L2224/04105 , H01L2224/05599 , H01L2224/18 , H01L2224/32225 , H01L2224/43 , H01L2224/4501 , H01L2224/45015 , H01L2224/4502 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/73267 , H01L2224/821 , H01L2224/92244 , H01L2224/97 , H01L2924/00014 , H01L2924/19107 , H01L2224/85399 , H01L2224/82 , H01L2924/20753
摘要： A method for interconnecting a die on a substrate of an electronic package. The method includes the steps of forming a plurality of free-end wire bonds on the die, wherein the free-end wire bonds are upstanding from the die, and encapsulating the free-end wire bonds in an encapsulation layer. Planarizing the encapsulation layer is performed so that the free-end wire bonds are exposed for electrical connection. Interconnecting the free-end wire bonds is provided by applying an interconnection layer on the encapsulation layer.
摘要翻译： 一种用于将电子封装的基板上的裸片互连的方法。 该方法包括以下步骤：在管芯上形成多个自由端引线键合，其中自由端引线键合从管芯直立，并将自由端引线键合封装在封装层中。 执行平坦化封装层，使得自由端引线接合被暴露用于电连接。 通过在封装层上施加互连层来提供互连自由端引线键合。
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公开(公告)号：US20160035691A1
公开(公告)日：2016-02-04
申请号：US14784127
申请日：2014-03-27
发明人： Koji YAMAZAKI , Takeshi ARAKI
CPC分类号： H01L24/49 , B23K20/004 , B23K35/3006 , C22C5/06 , H01L23/49 , H01L23/49513 , H01L24/29 , H01L24/32 , H01L24/43 , H01L24/45 , H01L24/48 , H01L24/83 , H01L24/85 , H01L2224/04026 , H01L2224/05568 , H01L2224/05639 , H01L2224/26175 , H01L2224/2733 , H01L2224/29111 , H01L2224/32225 , H01L2224/325 , H01L2224/32507 , H01L2224/4501 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/4516 , H01L2224/48225 , H01L2224/48499 , H01L2224/48507 , H01L2224/49173 , H01L2224/83011 , H01L2224/83014 , H01L2224/8309 , H01L2224/8314 , H01L2224/83191 , H01L2224/83203 , H01L2224/83385 , H01L2224/83439 , H01L2224/85801 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01026 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01031 , H01L2924/01032 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01083 , H01L2924/01322 , H01L2924/014 , H01L2924/10254 , H01L2924/10272 , H01L2924/1033 , H01L2924/12 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/19107 , H01L2924/2064 , H01L2924/20641 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/351 , H01L2924/00 , H01L2924/00014 , H01L2924/00012
摘要： A semiconductor device includes, an alloy layer sandwiched between a first Ag layer formed on a mounting board or circuit board and a second Ag layer formed on a semiconductor element, wherein the alloy layer contains an intermetallic compound of Ag3Sn formed by Ag components of the first Ag layer and the second Ag layer and Sn, and wherein a plurality of wires containing Ag are arranged extended from an outside-facing periphery of the alloy layer.
摘要翻译： 半导体装置包括：夹在形成于安装基板或电路基板上的第一Ag层与形成在半导体元件上的第二Ag层之间的合金层，其中，所述合金层含有由所述第一Ag的Ag成分形成的Ag 3 Sn的金属间化合物， Ag层和第二Ag层和Sn，并且其中包含Ag的多个布线从合金层的面向外周延伸设置。
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公开(公告)号：US11842976B2
公开(公告)日：2023-12-12
申请号：US17974391
申请日：2022-10-26
发明人： Hanlung Tsai , Chengchung Lin , Mingchih Chen
CPC分类号： H01L24/43 , H01L21/56 , H01L23/3135 , H01L24/45 , H01L24/48 , H01L24/49 , H01L23/29 , H01L23/296 , H01L2224/4321 , H01L2224/4382 , H01L2224/4501 , H01L2224/48105 , H01L2224/48225 , H01L2224/48464 , H01L2224/49051
摘要： The present disclosure provides a chip package structure having a heat sink and a method making the same. The method includes: bonding a chip to a top surface of a package substrate and forming a heat-conducting lead having an arc-shape and placed on the chip in a vertical direction, a first end of the heat-conducting lead is connected with a surface of the chip, and a second end is connected with a solder ball; forming a plastic package material layer that protects the chip and the heat-conducting lead; forming a heat-conducting adhesive layer on the surface of the plastic package material layer, where the heat-conducting adhesive layer is connected with the solder ball on the second end of the heat-conducting lead; and forming a heat dissipation layer on a surface of the heat-conducting adhesive layer. With the present disclosure, the heat dissipation efficiency of the chip is effectively improved.
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公开(公告)号：US09607931B2
公开(公告)日：2017-03-28
申请号：US14421636
申请日：2013-05-16
发明人： Hiroki Yasuda
CPC分类号： H01L23/4822 , H01L23/48 , H01L24/40 , H01L24/46 , H01L25/072 , H01L25/18 , H01L2224/40137 , H01L2224/40139 , H01L2224/40225 , H01L2224/40227 , H01L2224/4501 , H01L2224/4502 , H01L2924/00014 , H01L2924/1203 , H01L2924/1305 , H01L2924/13055 , H02M3/07 , H02M7/48 , H01L2924/00 , H01L2224/37099 , H01L2224/84
摘要： Provided is a semiconductor device that can suppress a temperature increase in beam leads while reducing the number of wiring lines and can suppress an increase in manufacturing costs. The semiconductor device is provided with a power module including an upper arm and a lower arm each configured by connecting in parallel a plurality of power elements and a plurality of rectifying elements. Current to one arm flows through a plurality of separately wired beam leads. A portion of the power elements and a portion of the rectifying elements in one arm form a pair and are connected by a common beam lead.
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公开(公告)号：US09536855B2
公开(公告)日：2017-01-03
申请号：US14784127
申请日：2014-03-27
发明人： Koji Yamazaki , Takeshi Araki
CPC分类号： H01L24/49 , B23K20/004 , B23K35/3006 , C22C5/06 , H01L23/49 , H01L23/49513 , H01L24/29 , H01L24/32 , H01L24/43 , H01L24/45 , H01L24/48 , H01L24/83 , H01L24/85 , H01L2224/04026 , H01L2224/05568 , H01L2224/05639 , H01L2224/26175 , H01L2224/2733 , H01L2224/29111 , H01L2224/32225 , H01L2224/325 , H01L2224/32507 , H01L2224/4501 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/4516 , H01L2224/48225 , H01L2224/48499 , H01L2224/48507 , H01L2224/49173 , H01L2224/83011 , H01L2224/83014 , H01L2224/8309 , H01L2224/8314 , H01L2224/83191 , H01L2224/83203 , H01L2224/83385 , H01L2224/83439 , H01L2224/85801 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01026 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01031 , H01L2924/01032 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01083 , H01L2924/01322 , H01L2924/014 , H01L2924/10254 , H01L2924/10272 , H01L2924/1033 , H01L2924/12 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/19107 , H01L2924/2064 , H01L2924/20641 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/351 , H01L2924/00 , H01L2924/00014 , H01L2924/00012
摘要： A semiconductor device includes, an alloy layer sandwiched between a first Ag layer formed on a mounting board or circuit board and a second Ag layer formed on a semiconductor element, wherein the alloy layer contains an intermetallic compound of Ag3Sn formed by Ag components of the first Ag layer and the second Ag layer and Sn, and wherein a plurality of wires containing Ag are arranged extended from an outside-facing periphery of the alloy layer.
摘要翻译： 半导体装置包括：夹在形成于安装基板或电路基板上的第一Ag层与形成在半导体元件上的第二Ag层之间的合金层，其中，所述合金层含有由所述第一Ag的Ag成分形成的Ag 3 Sn的金属间化合物， Ag层和第二Ag层和Sn，并且其中包含Ag的多个布线从合金层的面向外周延伸设置。
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公开(公告)号：US20150235923A1
公开(公告)日：2015-08-20
申请号：US14421636
申请日：2013-05-16
发明人： Hiroki Yasuda
IPC分类号： H01L23/482 , H01L23/00 , H01L25/18
CPC分类号： H01L23/4822 , H01L23/48 , H01L24/40 , H01L24/46 , H01L25/072 , H01L25/18 , H01L2224/40137 , H01L2224/40139 , H01L2224/40225 , H01L2224/40227 , H01L2224/4501 , H01L2224/4502 , H01L2924/00014 , H01L2924/1203 , H01L2924/1305 , H01L2924/13055 , H02M3/07 , H02M7/48 , H01L2924/00 , H01L2224/37099 , H01L2224/84
摘要： Provided is a semiconductor device that can suppress a temperature increase in beam leads while reducing the number of wiring lines and can suppress an increase in manufacturing costs. The semiconductor device is provided with a power module including an upper arm and a lower arm each configured by connecting in parallel a plurality of power elements and a plurality of rectifying elements. Current to one arm flows through a plurality of separately wired beam leads. A portion of the power elements and a portion of the rectifying elements in one arm form a pair and are connected by a common beam lead.
摘要翻译： 提供一种能够抑制线束的温度升高同时减少布线数量并能够抑制制造成本上升的半导体装置。 半导体器件具有电源模块，该功率模块包括通过并联连接多个功率元件和多个整流元件而构成的上臂和下臂。 到一个臂的电流流过多个单独布线的波束引线。 功率元件的一部分和一个臂中的整流元件的一部分形成一对并且通过共用的光束引线连接。
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