摘要:
A cache device has a data memory capable of storing a piece of first cache line data and a piece of second cache line data for first and second ways in compressed form, and a tag memory configured to store, for each of the pieces of cache line data, a piece of tag data including uncompressed data writing state information, an absence flag, and a compression information field. In case of modifying only part of a cache line, i.e., a partial write, a request converter converts a write request into a read request, and a read-out piece of data is decompressed and written in a write status buffer. Data may be written from the write status buffer to the data memory without being compressed, which eliminates a need for decompression and compression for every writing or modifying operation of a piece of partial data, thereby reducing latency and power consumption.
摘要:
Systems and methods for managing memory access bandwidth include a spatial locality predictor. The spatial locality predictor includes a memory region table with prediction counters associated with memory regions of a memory. When cache lines are evicted from a cache, the sizes of the cache lines which were accessed by a processor are used for updating the prediction counters. Depending on values of the prediction counters, the sizes of cache lines which are likely to be used the processor predicted for the corresponding memory regions. Correspondingly, the memory access bandwidth between the processor and the memory may be reduced to fetch a smaller size data than a full cache line if the size of the cache line likely to be used is predicted to be less than that of the full cache line.
摘要:
An electronic device with a cache memory and a method of operating the electronic device are provided. The electronic device includes a cache memory including a plurality of cache lines each of which includes a first area with at least one storage space and a second area with at least one storage space, where the at least one storage space of the first area has a first size and the at least one storage space of the second area has a second size different from the first size, and a cache controller for storing the data requested for storage in one of the storage spaces of the first or second area, according to a compression factor associated with the data requested for storage when a request is made to store data in the cache memory.
摘要:
A computing element, system, and method for implementing control structures for a compressed cache in hardware. Embodiments provide a first engine configured to allocate and deallocate virtual memory pages and physical memory pages from pools of available pages to store received data to the compressed cache, a second engine configured to compress received data and store the compressed data. Embodiments also provide for embedding data within the virtual and physical memory pages to indicate page size, type, and data compression.
摘要:
In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for implementing and using a partial-address select-signal generator with address shift. For example, in one embodiment, such means may include receiving a plurality of address lines; splitting the plurality of address lines into a first sub-set of the plurality of address lines and a remaining sub-set of the plurality of address lines; passing the first subset of the plurality of address lines to an upper processing path; passing the remaining sub-set of the plurality of address lines to a lower processing path in parallel with the upper processing path; generating intermediate code on the upper processing path from the first sub-set of the plurality of address lines and from an intermediate carry result from the remaining sub-set of the plurality of address lines on the lower processing path; passing a hot signal type to a decoding unit on the upper processing path, wherein the hot signal type designates a decode scheme; generating specific hot-signal select line code based on the intermediate code and the hot signal type; and adopting decode scheme of the hot-signal select lines according to information from the lower processing path. Structure for performing the same are further disclosed.
摘要:
A network-based storage system includes multiple storage devices and system controllers. Each storage device in multiple aggregates of storage devices can include ownership portion(s) that are configured to indicate a system controller to which it belongs. First and second system controllers can form an HA pair, and can be in communication with each other, the storage devices, and a separate host server. A first system controller controls an aggregate of storage devices and can facilitate an automated hotswap replacement of a second system controller that controls another aggregate of storage devices with a separate third system controller that subsequently controls the other aggregate of storage devices. The first system controller can take over control of the second aggregate of storage devices during the automated hotswap replacement of the second system controller, and can exchange system identifiers and ownership portion information with the separate third system controller automatically during the hotswap.
摘要:
A technique for processing instructions includes examining instructions in an instruction stream of a processor to determine properties of the instructions. The properties indicate whether the instructions may belong in an instruction sequence subject to decode-time instruction optimization (DTIO). Whether the properties of multiple ones of the instructions are compatible for inclusion within an instruction sequence of a same group is determined. The instructions with compatible ones of the properties are grouped into a first instruction group. The instructions of the first instruction group are decoded subsequent to formation of the first instruction group. Whether the first instruction group actually includes a DTIO sequence is verified based on the decoding. Based on the verifying, DTIO is performed on the instructions of the first instruction group or is not performed on the instructions of the first instruction group.
摘要:
A technique for processing instructions includes examining instructions in an instruction stream of a processor to determine properties of the instructions. The properties indicate whether the instructions may belong in an instruction sequence subject to decode-time instruction optimization (DTIO). Whether the properties of multiple ones of the instructions are compatible for inclusion within an instruction sequence of a same group is determined. The instructions with compatible ones of the properties are grouped into a first instruction group. The instructions of the first instruction group are decoded subsequent to formation of the first instruction group. Whether the first instruction group actually includes a DTIO sequence is verified based on the decoding. Based on the verifying, DTIO is performed on the instructions of the first instruction group or is not performed on the instructions of the first instruction group.
摘要:
A memory having variable size blocks of failed memory addresses is connected to a TCAM storing data values of ranges of addresses in the memory. The ranges of addresses correspond to virtual addresses that, in combination with an offset, point away from failed memory addresses. A reduction circuit connected to the TCAM produces an output for each programmed range of addresses based on a virtual address. A priority encoder, connected to the reduction circuit, selects a first range from the reduction circuit and passes the first range to a random-access memory (RAM). Responsive to the virtual address bring an address in one of the ranges of addresses, the priority encoder passes the first range containing the virtual address to the RAM, which passes a corresponding offset value to the Adder based on the first range. The Adder calculates a physical memory address directing the virtual address to a functional memory location.
摘要:
A user visiting a space is equipped with a mobile device in communication with a service system. Media items held by the service system are associated with various locations around the space and a user arriving at such a location is presented with the corresponding item or items. Preferably, these media items are pre-emptively loaded into a cache of the user's mobile device in dependence on the user's progress around the space. Items can also be flushed from cache on this basis. Instead of, or as a precursor to, flushing an item from cache to free up space, the cache space occupied by an item is reduced by degrading it.