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1.
公开(公告)号:US20230359565A1
公开(公告)日:2023-11-09
申请号:US18357732
申请日:2023-07-24
发明人: Joseph Zbiciak
IPC分类号: G06F12/0897 , G06F9/30 , G06F12/0815 , G06F12/0875 , G06F9/345 , G06F9/38 , G06F12/0862 , G06F12/04
CPC分类号: G06F12/0897 , G06F9/3013 , G06F12/0815 , G06F12/0875 , G06F9/3001 , G06F9/30036 , G06F9/30047 , G06F9/30072 , G06F9/3012 , G06F9/30145 , G06F9/345 , G06F9/3822 , G06F9/383 , G06F9/3853 , G06F9/3887 , G06F12/0862 , G06F9/3877 , G06F12/04 , G06F9/30101 , G06F2212/452 , G06F2212/6026 , G06F2212/1056 , G06F2212/454 , G06F9/3552
摘要: A streaming engine employed in a digital data processor may specify a fixed read-only data stream defined by plural nested loops. An address generator produces address of data elements for the nested loops. A steam head register stores data elements next to be supplied to functional units for use as operands. A stream template register independently specifies a linear address or a circular address mode for each of the nested loops.
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公开(公告)号:US20220327102A1
公开(公告)日:2022-10-13
申请号:US17846208
申请日:2022-06-22
发明人: Yuxin DE
摘要: The technology of this application relates to a data index management method and apparatus in a storage system, and relates to the field of computer technologies, to help create a data index by using a data index operation unit with a proper grain, thereby reducing storage space occupied by data indexes. The method includes obtaining first to-be-written data, where a logical address range of the first to-be-written data is a first logical address range, and generating a data index based on an alignment status between a logical address range of a to-be-generated data index in the first logical address range and data index operation units with different lengths in the storage system, where the storage system includes a data index operation unit with a first length and a data index operation unit with a second length, and the first length is greater than the second length.
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公开(公告)号:US10895992B2
公开(公告)日:2021-01-19
申请号:US16254043
申请日:2019-01-22
申请人: Ultrata, LLC
发明人: Steven J. Frank , Larry Reback
IPC分类号: G06F12/00 , G06F3/06 , G06F11/00 , G06F12/0815 , G06F11/30 , G06F11/34 , G06F12/04 , G06F12/02 , G06F11/14
摘要: According to one embodiment, a hardware-based processing node of a plurality of hardware-based processing nodes in an object memory fabric can comprise a memory module storing and managing a plurality of memory objects in a hierarchy of the object memory fabric. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The object memory fabric can distribute and track the memory objects across the hierarchy of the object memory fabric and the plurality of hardware-based processing nodes on a per-object basis. Distributing the memory objects across the hierarchy of the object memory fabric and the plurality of hardware-based processing nodes can comprise storing, on a per-object basis, each memory object on two or more nodes of the plurality of hardware-based processing nodes of the object memory fabric.
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公开(公告)号:US10809923B2
公开(公告)日:2020-10-20
申请号:US16266460
申请日:2019-02-04
申请人: Ultrata, LLC
发明人: Steven J. Frank , Larry Reback
IPC分类号: G06F12/00 , G06F3/06 , G06F11/00 , G06F12/0815 , G06F11/30 , G06F11/34 , G06F12/04 , G06F12/02 , G06F11/14
摘要: According to one embodiment, a hardware-based processing node of a plurality of hardware-based processing nodes in an object memory fabric can comprise a memory module storing and managing a plurality of memory objects in a hierarchy of the object memory fabric. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The object memory fabric can utilize a memory fabric protocol between the hardware-based processing node and one or more other nodes of the plurality of hardware-based processing nodes to distribute and track the memory objects across the object memory fabric. The memory fabric protocol can be utilized across a dedicated link or across a shared link between the hardware-based processing node and one or more other nodes of the plurality of hardware-based processing nodes.
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公开(公告)号:US20200311530A1
公开(公告)日:2020-10-01
申请号:US16832400
申请日:2020-03-27
发明人: Yujie WEN , Zhijiong LUO
摘要: A digital integrated circuit with embedded memory for neural network inferring may include a controller and a matrix of processing blocks and cyclic bidirectional interconnections, where each processing block is coupled to 4 neighboring processing blocks regardless of its position in the matrix. A cyclic bidirectional interconnection may transmit every processing block's output to its upper, lower, left, right neighboring blocks or to its cyclic neighbors of the same row or column in replacement of any missing upper, lower, left or right neighbors. Each processing block may include invariant word buffers, variant word buffers, a multiplexer, and a processing unit. The multiplexer may select one of the 4 neighbor processing blocks' outputs. The processing unit may accept as inputs the multiplexer's selected value, a selected value from the variant word buffers and a selected value from the invariant word buffer and produce output which acts as the processing block's output.
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公开(公告)号:US10579514B2
公开(公告)日:2020-03-03
申请号:US15819405
申请日:2017-11-21
IPC分类号: G06F12/02 , G06F13/00 , G06F9/30 , G06F9/34 , G06F12/04 , G06F12/06 , G06F13/16 , G06F9/38 , G06F8/41
摘要: Embodiments relate to accessing data in a memory. A method for accessing data in a memory coupled to a processor is provided. The method receives a memory reference instruction for accessing data of a first size at an address in the memory. The method determines an alignment size of the address in the memory. The method accesses the data of the first size in one or more groups of data by accessing each group of data block concurrently. The groups of data have sizes that are multiples of the alignment size.
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公开(公告)号:US10474580B2
公开(公告)日:2019-11-12
申请号:US16113285
申请日:2018-08-27
申请人: Google LLC
IPC分类号: G06F12/08 , G06F12/0868 , G06F12/0871 , G06F12/0873 , G06F12/12 , G06F12/1009 , G06F12/1027 , G06F12/02 , G06F12/04 , G06F12/0815
摘要: Methods, systems, and apparatus for receiving a request to access, from a main memory, data contained in a first portion of a first page of data, the first page of data having a first page size; initiating a page fault based on determining that the first page of data is not stored in the main memory; allocating a portion of the main memory equivalent to the first page size; transferring the first portion of the first page of data from the secondary memory to the allocated portion of the main memory without transferring the entire first page of data; and updating a first page table entry associated with the first portion of the first page of data to point to a location of the allocated portion of the main memory to which the first portion of the first page of data is transferred.
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公开(公告)号:US10437781B2
公开(公告)日:2019-10-08
申请号:US15640286
申请日:2017-06-30
发明人: Anindya Patthak , Victor Chen , Shasank Kisan Chavan , Jesse Kamp , Amit Ganesh , Vineet Marwah
IPC分类号: G06F16/00 , G06F16/174 , H03M7/30 , G06F12/04
摘要: A method, apparatus, and system for OZIP, a data compression and decompression codec, is provided. OZIP utilizes a fixed size static dictionary, which may be generated from a random sampling of input data to be compressed. Compression by direct token encoding to the static dictionary streamlines the encoding and avoids expensive conditional branching, facilitating hardware implementation and high parallelism. By bounding token definition sizes and static dictionary sizes to hardware architecture constraints such as word size or processor cache size, hardware implementation can be made fast and cost effective. For example, decompression may be accelerated by using SIMD instruction processor extensions. A highly granular block mapping in optional stored metadata allows compressed data to be accessed quickly at random, bypassing the processing overhead of dynamic dictionaries. Thus, OZIP can support low latency random data access for highly random workloads, such as for OLTP systems.
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公开(公告)号:US10394480B2
公开(公告)日:2019-08-27
申请号:US15769418
申请日:2016-01-22
申请人: HITACHI, LTD.
发明人: Masahiro Tsuruya , Ryo Hanafusa , Osamu Kawaguchi
摘要: It is possible to prevent unoccupied blocks from being depleted by a write of logical-physical management information. A processor is capable of performing an unoccupied user block generation process by moving user data stored in allocated user blocks in order to generate unoccupied user blocks serving as unoccupied blocks among allocated user blocks, and performing an unoccupied meta block generation process by moving meta data stored in allocated meta blocks in order to generate unoccupied meta blocks serving as unoccupied blocks among the allocated meta blocks. The processor calculates the number of unoccupied meta blocks to be consumed, that is, the number of unoccupied meta blocks to be consumed by the unoccupied user block generation process. The processor performs the unoccupied meta block generation process based on the number of unoccupied meta blocks to be consumed.
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10.
公开(公告)号:US10289667B2
公开(公告)日:2019-05-14
申请号:US15257280
申请日:2016-09-06
申请人: Elsevier B.V.
发明人: Marius Doornenbal , Inga Kohlhof
摘要: Computer-program products and methods for automatically annotating terms, such as ambiguous terms, in an electronic text document are disclosed. In one embodiment, a method of annotating a text document includes determining, by a computing device, a term of interest within the text document. The method further includes searching a data structure including incongruous term pairs (tx, tt) determined from a controlled vocabulary for the term of interest appearing as a term tt, wherein the term tt is a linguistic head of a term tx of the incongruous term pairs (tx, tt). The method further includes annotating the term of interest with a meaning provided by the controlled vocabulary only if a term tx of the incongruous term pairs (tx, tt) associated with the term of interest in the data structure is not present within a predetermined textual distance of the term of interest in the text document.
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