STORAGE CONTROLLER AND METHOD OF OPERATING ELECTRONIC SYSTEM

    公开(公告)号:US20230179418A1

    公开(公告)日:2023-06-08

    申请号:US17898045

    申请日:2022-08-29

    CPC classification number: H04L9/3213 H04L9/0643 H04L9/0861 H04L9/3247

    Abstract: A storage device includes a memory device storing data, and a controller controlling the memory device. The controller obtains and stores a certificate including a public key of an administrator from a host device, provides a nonce to the host device in response to a request from the host device, receives a token request signature including the nonce, a user identifier (ID), an allowed command list and a lifetime from the host device, and when it is verified that the token request signature is generated by a legitimate administrator by decrypting the token request signature with the public key, generates a token for allowing a user corresponding to the user ID to execute a command included in the allowed command list during the lifetime, and a token secret key corresponding to the token, and provides the token and the token secret key to the host device.

    FRACTIONAL DIVIDER WITH PHASE SHIFTER AND FRACTIONAL PHASE LOCKED LOOP INCLUDING THE SAME

    公开(公告)号:US20230170912A1

    公开(公告)日:2023-06-01

    申请号:US17964377

    申请日:2022-10-12

    CPC classification number: H03L7/1976 H03L7/081 H03L7/093

    Abstract: A fractional divider processing circuitry is to receive one of a plurality of clock signals as an input clock signal, and generate a first division clock signal based on the input clock signal and a first control signal. Phases of the plurality of clock signals partially overlap each other. The processing circuitry generates a delta-sigma modulation signal based on the first division clock signal and a frequency control word, and generates a second division clock signal based on the plurality of clock signals, the first division clock signal and a second control signal. The second control signal corresponds to a quantization noise of the delta-sigma modulation signal. The processing circuitry generates the second control signal and a digital control word based on the quantization noise of the delta-sigma modulator. The processing circuitry generates a final division clock signal based on the second division clock signal and the digital control word.

    SEMICONDUCTOR MEMORY DEVICES
    3.
    发明公开

    公开(公告)号:US20230200053A1

    公开(公告)日:2023-06-22

    申请号:US17945235

    申请日:2022-09-15

    CPC classification number: H10B12/315 H10B12/34 H10B12/033

    Abstract: A semiconductor memory device includes a substrate including a memory cell region, a plurality of capacitor structures arranged in the memory cell region of the substrate and including a plurality of lower electrodes, a capacitor dielectric layer, and an upper electrode, a first support pattern contacting sidewalls of the plurality of lower electrodes of the plurality of capacitor structures to support the plurality of lower electrodes, and a second support pattern located at a higher vertical level than a vertical level of the first support pattern and contacting the sidewalls of the plurality of lower electrodes to support the plurality of lower electrodes. The plurality of lower electrodes have a plurality of recessed electrode portions, respectively, in upper portions of the plurality of lower electrodes.

    Semiconductor devices
    6.
    发明授权

    公开(公告)号:US12289911B2

    公开(公告)日:2025-04-29

    申请号:US18378710

    申请日:2023-10-11

    Abstract: A semiconductor device includes an active pattern on a substrate, the active pattern extending in a first direction parallel to an upper surface of the substrate, a gate structure on the active pattern, the gate structure extending in a second direction parallel to the upper surface of the substrate and crossing the first direction, channels spaced apart from each other in a third direction perpendicular to the upper surface of the substrate, each of the channels extending through the gate structure, a source/drain layer on a portion of the active pattern adjacent the gate structure, the source/drain layer contacting the channels, and a sacrificial pattern on an upper surface of each of opposite edges of the portion of the active pattern in the second direction, the sacrificial pattern contacting a lower portion of a sidewall of the source/drain layer and including silicon-germanium.

    Electronic device including conductive member

    公开(公告)号:US12289843B2

    公开(公告)日:2025-04-29

    申请号:US18403020

    申请日:2024-01-03

    Abstract: An electronic device is provided. The electronic device includes a foldable display, a decoration member made of a resin material to surround at least a portion of the foldable display, a support member configured to support the foldable display and including a metal area connected to the decoration member, and a conductive member disposed on the decoration member and electrically connected to the metal area. The conductive member may include a first conductive member arranged to face the support member and a second conductive member arranged parallel to the first conductive member and electrically connected to the first conductive member.

    Method and device for transmitting or receiving data in wireless communication system

    公开(公告)号:US12289716B2

    公开(公告)日:2025-04-29

    申请号:US18626766

    申请日:2024-04-04

    Abstract: A user equipment for transmitting and receiving a signal in a wireless communication system may include a transceiver configured to receive, from a base station, downlink control information (DCI), and at least one processor configured to, based on a configuration state of a supplementary uplink (SUL) carrier indicated to the user equipment by the base station, determine whether information indicating activation or inactivation of the SUL carrier is present in the DCI, and based on a result of the determining of whether the information indicating activation or inactivation of the SUL carrier is present, determine a carrier to transmit uplink data scheduled by using the DCI.

    Methods and system for triggers of leaving procedure

    公开(公告)号:US12289708B2

    公开(公告)日:2025-04-29

    申请号:US17738996

    申请日:2022-05-06

    Abstract: Methods and systems for triggers of leaving procedure methods and systems for triggers of leaving procedure. The method includes receiving, by the UE, an RRC signaling connection release from a wireless communication network. The RRC signaling connection release indicates that the UE moves to an RRC inactive state. The UE is in a multi-user services identity module (MUSIM) mode. The method includes determining, by the UE, if there is an activity over 3GPP access due to another USIM. The method includes transmitting, by the UE, a non-access stratum (NAS) message including a service request message. The method includes triggering, by the wireless communication network, a release procedure to transfer the UE to an IDLE state in response to receiving the services request message in RRC Inactive state.

    Method for calculating location and electronic device therefor

    公开(公告)号:US12289702B2

    公开(公告)日:2025-04-29

    申请号:US17673719

    申请日:2022-02-16

    Abstract: An electronic device according to various embodiments of the present disclosure comprises: at least one wireless communication module; and a processor, wherein the processor can control the wireless communication module to respectively receive a plurality of pieces of data from a plurality of external electronic devices, identify a time when each of the plurality of pieces of data has been received, and, when location information regarding the plurality of external electronic devices is included in the plurality of pieces of data, calculate the location of the electronic device by using a time difference in reception of the plurality of pieces of data and the location information regarding the plurality of external electronic devices. Various other embodiments are also possible.

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