公开(公告)号：US11631766B2

公开(公告)日：2023-04-18

申请号：US17227392

申请日：2021-04-12

申请人： UNITED MICROELECTRONICS CORP.

发明人： Cheng-Hua Yang ,  Chih-Chien Chang ,  Shen-De Wang

IPC分类号： H01L29/78 ,  H01L29/10 ,  H01L29/40 ,  H01L29/423

摘要： A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, a first oxide layer, a field plate, and a second oxide layer. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure respectively. The first oxide layer includes a first portion disposed between the gate structure and the semiconductor substrate and a second portion disposed between the gate structure and the drain region. The field plate is partly disposed above the gate structure and partly disposed above the second portion of the first oxide layer. The second oxide layer includes a first portion disposed between the field plate and the gate structure and a second portion disposed between the field plate and the second portion of the first oxide layer.

公开(公告)号：US10651183B1

公开(公告)日：2020-05-12

申请号：US16221382

申请日：2018-12-14

申请人： United Microelectronics Corp.

发明人： Jianjun Yang ,  Cheng-Hua Yang ,  Fan-Chi Meng ,  Chih-Chien Chang ,  Shen-De Wang

IPC分类号： H01L21/336 ,  H01L27/11517

摘要： A manufacturing method of a semiconductor device includes: providing a substrate having memory and high voltage regions; sequentially forming a floating gate layer and a hard mask layer on the substrate; patterning the hard mask layer to form a first opening exposing a portion of the floating gate layer in the range of the memory region; patterning the hard mask layer and the floating gate layer to form a second opening overlapped with the high voltage region; performing a first thermal growth process to simultaneously form a first oxide structure on the portion of the floating gate layer exposed by the first opening, and to form a second oxide structure on a portion of the substrate overlapped with the second opening; removing the hard mask layer; and patterning the floating gate layer by using the first oxide structure as a mask.

公开(公告)号：US20230268437A1

公开(公告)日：2023-08-24

申请号：US17702831

申请日：2022-03-24

申请人： UNITED MICROELECTRONICS CORP.

发明人： Chih-Chien Chang ,  Shen-De Wang ,  Cheng-Hua Yang ,  LINGGANG FANG ,  JIANJUN YANG ,  Wei Ta

IPC分类号： H01L29/78 ,  H01L29/788 ,  H01L29/423 ,  H01L27/088 ,  H01L29/66

CPC分类号： H01L29/7816 ,  H01L29/788 ,  H01L29/42328 ,  H01L27/088 ,  H01L29/66484 ,  H01L29/66825 ,  H01L29/66689 ,  H01L29/6656

摘要： A power device includes a substrate, an ion well in the substrate, a body region in the ion well, a source doped region in the body region, a drain doped region in the ion well, and gates on the substrate between the source doped region and the drain doped region. The gates include a first gate adjacent to the source doped region, a second gate adjacent to the drain doped region, and a stacked gate structure between the first gate and the second gate.

公开(公告)号：US20230215946A1

公开(公告)日：2023-07-06

申请号：US18120995

申请日：2023-03-13

申请人： UNITED MICROELECTRONICS CORP.

发明人： Cheng-Hua Yang ,  Chih-Chien Chang ,  Shen-De Wang

IPC分类号： H01L29/78 ,  H01L29/423 ,  H01L29/40 ,  H01L29/10

CPC分类号： H01L29/7816 ,  H01L29/42368 ,  H01L29/402 ,  H01L29/1095

摘要： A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, a first oxide layer, a field plate, and a second oxide layer. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure respectively. The first oxide layer includes a first portion disposed between the gate structure and the semiconductor substrate and a second portion disposed between the gate structure and the drain region. The field plate is partly disposed above the gate structure and partly disposed above the second portion of the first oxide layer. The second oxide layer includes a first portion disposed between the field plate and the gate structure and a second portion disposed between the field plate and the second portion of the first oxide layer.

公开(公告)号：US20220310839A1

公开(公告)日：2022-09-29

申请号：US17227392

申请日：2021-04-12

申请人： UNITED MICROELECTRONICS CORP.

发明人： Cheng-Hua Yang ,  Chih-Chien Chang ,  Shen-De Wang

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/40

摘要： A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, a first oxide layer, a field plate, and a second oxide layer. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure respectively. The first oxide layer includes a first portion disposed between the gate structure and the semiconductor substrate and a second portion disposed between the gate structure and the drain region. The field plate is partly disposed above the gate structure and partly disposed above the second portion of the first oxide layer. The second oxide layer includes a first portion disposed between the field plate and the gate structure and a second portion disposed between the field plate and the second portion of the first oxide layer.

公开(公告)号：US10276652B1

公开(公告)日：2019-04-30

申请号：US16005652

申请日：2018-06-11

申请人： UNITED MICROELECTRONICS CORP.

发明人： Cheng-Hua Yang ,  Ke-Feng Lin ,  Ming-Tsung Lee ,  Shih-Teng Huang ,  Chih-Chung Wang ,  Chiu-Te Lee ,  Shu-Wen Lin

IPC分类号： H01L29/06 ,  H01L29/872

摘要： A schottky diode includes a schottky junction, an ohmic junction, a first isolation structure and a plurality of doped regions. The schottky junction includes a first well in a substrate and a first electrode contacting the first well. The ohmic junction includes a junction region in the first well and a second electrode contacting the junction region. The first isolation structure is disposed in the substrate and separates the schottky junction from the ohmic junction. The doped regions are located in the first well and under the schottky junction, wherein the doped regions separating from each other constitute a top-view profile of concentric circles.

公开(公告)号：US09224859B1

公开(公告)日：2015-12-29

申请号：US14590957

申请日：2015-01-06

申请人： UNITED MICROELECTRONICS CORP.

发明人： Shih-Chieh Pu ,  Ming-Tsung Lee ,  Cheng-Hua Yang ,  Nien-Chung Li ,  Wen-Fang Lee ,  Chih-Chung Wang

IPC分类号： H01L29/78 ,  H01L29/417 ,  H01L29/772 ,  H01L29/10 ,  H01L29/08

CPC分类号： H01L29/1095 ,  H01L29/0619 ,  H01L29/063 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/7835

摘要： A high voltage metal-oxide-semiconductor (HV MOS) device includes a substrate including a first conductivity type, a gate positioned on the substrate, a drain region formed in the substrate, the drain region including a second conductivity type, and a source region formed in the substrate, where the source region includes at least one first part and at least one second part, the first part includes the second conductivity type, the second part includes the first conductivity type, and the first conductivity type and the second conductivity type are complementary.

摘要翻译： 一种高电压金属氧化物半导体（HV MOS）器件包括：包括第一导电类型的衬底，位于衬底上的栅极，形成在衬底中的漏极区，包括第二导电类型的漏极区和源极区 形成在基板中，其中源区域包括至少一个第一部分和至少一个第二部分，第一部分包括第二导电类型，第二部分包括第一导电类型，第一导电类型和第二导电类型 是互补的

公开(公告)号：US20140159155A1

公开(公告)日：2014-06-12

申请号：US14181733

申请日：2014-02-17

申请人： UNITED MICROELECTRONICS CORP.

发明人： Ming-Tsung Lee ,  Cheng-Hua Yang ,  Wen-Fang Lee ,  Chih-Chung Wang ,  Chih-Wei Hsu ,  Po-Ching Chuang

IPC分类号： H01L29/78

CPC分类号： H01L29/7816 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/402 ,  H01L29/404 ,  H01L29/42368

摘要： A layout pattern of an implant layer includes at least a linear region and at least a non-linear region. The linear region includes a plurality of first patterns to accommodate first dopants and the non-linear region includes a plurality of second patterns to accommodate the first dopants. The linear region abuts the non-linear region. Furthermore, a pattern density of the first patterns in the linear region is smaller than a pattern density of the second patterns in the non-linear region.

摘要翻译： 植入层的布局图案至少包括线性区域和至少非线性区域。 线性区域包括容纳第一掺杂剂的多个第一图案，并且非线性区域包括多个第二图案以容纳第一掺杂剂。 线性区域邻接非线性区域。 此外，线性区域中的第一图案的图案密度小于非线性区域中的第二图案的图案密度。

公开(公告)号：US20240321973A1

公开(公告)日：2024-09-26

申请号：US18138728

申请日：2023-04-24

申请人： UNITED MICROELECTRONICS CORP.

发明人： Cheng-Hua Yang ,  Chih-Chien CHANG ,  Shen-De WANG ,  JIANJUN YANG ,  Wei Ta ,  Yuan-Hsiang Chang

IPC分类号： H01L29/40 ,  H01L29/66 ,  H01L29/78 ,  H10B41/35

CPC分类号： H01L29/404 ,  H01L29/401 ,  H01L29/66681 ,  H01L29/66825 ,  H01L29/7816 ,  H10B41/35

摘要： A power metal-oxide-semiconductor structure includes a semiconductor substrate, a gate electrode disposed above the semiconductor substrate, a field plate, and an electrically conductive pattern. The gate electrode and the field plate are disposed above the semiconductor substrate, the electrically conductive pattern is disposed between the field plate and the semiconductor substrate in a vertical direction, and the field plate and the electrically conductive pattern are located at the same side of the gate electrode in a horizontal direction. A manufacturing method of a power metal-oxide-semiconductor structure includes the following steps. The electrically conductive pattern and the field plate are formed above a first region of the semiconductor substrate. Subsequently, the gate electrode is formed above the first region of the semiconductor substrate.

公开(公告)号：US11990546B2

公开(公告)日：2024-05-21

申请号：US18120995

申请日：2023-03-13

申请人： UNITED MICROELECTRONICS CORP.

发明人： Cheng-Hua Yang ,  Chih-Chien Chang ,  Shen-De Wang

IPC分类号： H01L29/78 ,  H01L29/10 ,  H01L29/40 ,  H01L29/423

CPC分类号： H01L29/7816 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/42368

摘要： A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, a first oxide layer, a field plate, and a second oxide layer. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure respectively. The first oxide layer includes a first portion disposed between the gate structure and the semiconductor substrate and a second portion disposed between the gate structure and the drain region. The field plate is partly disposed above the gate structure and partly disposed above the second portion of the first oxide layer. The second oxide layer includes a first portion disposed between the field plate and the gate structure and a second portion disposed between the field plate and the second portion of the first oxide layer.