公开(公告)号：US20030207499A1

公开(公告)日：2003-11-06

申请号：US10430986

申请日：2003-05-07

Applicant: Tessera, Inc.

Inventor： Thomas H. DiStefano ,  Konstantine Karavakis ,  Craig S. Mitchell ,  John W. Smith

IPC: H01L021/44

CPC classification number: H01L24/50 ,  H01L21/565 ,  H01L23/3121 ,  H01L2224/50 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  Y10T29/49146 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A component incorporating a dielectric element such as a polymeric film with leads and terminals thereon is assembled with a semiconductor chip and bond regions of the leads are connected to contacts of the chip. At least one lead incorporates a plural set of connecting regions connecting the bond region of that lead to a plurality of terminals. One or more of the connecting regions in each such plural set are severed so as to leave less than all of the terminals associated with each such plural set connected to the contacts of the chip.

Abstract translation: 将包含诸如其上具有引线和端子的聚合物膜的电介质元件的部件与半导体芯片组装，并且引线的接合区域连接到芯片的触点。 至少一个引线包括将该引线的键合区域连接到多个端子的多组连接区域。 每个这样的多个组中的一个或多个连接区域被切断，以便留下少于与连接到芯片的触点的每个这样的多个组相关联的所有终端。

公开(公告)号：US20040238922A1

公开(公告)日：2004-12-02

申请号：US10872105

申请日：2004-06-18

Applicant: Tessera, Inc.

Inventor： Thomas H. DiStefano ,  Gary W. Grube ,  Igor Y. Khandros ,  Gaetan Mathieu ,  Jason Sweis ,  Laurie Union ,  David Gibson

IPC: H01L023/495

CPC classification number: H01L24/86 ,  H01L23/3107 ,  H01L23/49572 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/49861 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H05K3/361 ,  H05K3/4084 ,  H01L2924/00

Abstract: A semiconductor chip mounting component includes a support structure adapted to engage a semiconductor chip. The support structure has a top surface, a bottom surface, and a gap extending through the support structure for defining first and second portions of the support structure on opposite sides of the gap. The support structure includes at least one elongated bus disposed alongside the gap, on the second portion of the support structure. The support structure includes a plurality of electrically conductive leads, each lead having a connection section extending across the gap, the connection section having a first end disposed on the first portion of the support structure, and a second end secured to the bus. Each lead includes a frangible section disposed between the first and second ends of the connection section, the frangible section having a cross-sectional area that is smaller than a cross-sectional area of the connection section. The gap is open at the bottom surface of the support structure. A semiconductor chip is disposed beneath the bottom surface of the support structure. The leads are adapted to be bonded to contacts on the semiconductor chip by breaking the frangible sections of the leads so as to disconnect the second ends of the leads from the bus and engage the leads with the contacts of the semiconductor chip.

Abstract translation: 半导体芯片安装部件包括适于接合半导体芯片的支撑结构。 支撑结构具有顶表面，底表面和延伸穿过支撑结构的间隙，用于限定支撑结构在间隙的相对侧上的第一和第二部分。 支撑结构包括在支撑结构的第二部分上沿着间隙布置的至少一个细长总线。 支撑结构包括多个导电引线，每个引线具有跨越间隙延伸的连接部分，连接部分具有设置在支撑结构的第一部分上的第一端和固定到总线的第二端。 每个引线包括设置在连接部分的第一和第二端之间的易碎部分，该易碎部分的横截面积小于连接部分的横截面面积。 间隙在支撑结构的底部表面开口。 半导体芯片设置在支撑结构的底表面下方。 引线适于通过断开引线的易碎部分而与半导体芯片上的触点接合，从而将引线的第二端与母线断开，并与半导体芯片的触点接合引线。

公开(公告)号：US20030027373A1

公开(公告)日：2003-02-06

申请号：US10229593

申请日：2002-08-28

Applicant: Tessera, Inc.

Inventor： Thomas H. DiStefano ,  Joseph Fjelstad

IPC: H01L021/48

CPC classification number: H01L21/568 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49572 ,  H01L24/32 ,  H01L24/80 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/08225 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/80203 ,  H01L2224/80207 ,  H01L2224/81192 ,  H01L2224/81904 ,  H01L2224/83209 ,  H01L2224/9212 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/80001 ,  H01L2224/81

Abstract: A method of treating an interposer layer includes disposing an interposer layer between a semiconductor wafer and a substrate so that voids within the interposer layer are sealed and applying pressure to substantially eliminate the voids. A method of creating a substantially void-free interposer layer includes injecting the interposer layer between a wafer and a substrate and applying pressure to substantially remove the voids.

Abstract translation: 处理插入层的方法包括在半导体晶片和基板之间设置插入层，使得内插层内的空隙被密封并施加压力以基本上消除空隙。 创建基本上无空隙的中介层的方法包括将晶片和衬底之间的插入层注入并施加压力以基本上去除空隙。

公开(公告)号：US20020182841A1

公开(公告)日：2002-12-05

申请号：US10162822

申请日：2002-06-05

Applicant: Tessera, Inc.

Inventor： Thomas H. DiStefano ,  Konstantine Karavakis ,  Craig Mitchell ,  John W. Smith

IPC: H01L023/48

CPC classification number: H01L24/50 ,  H01L21/565 ,  H01L23/3121 ,  H01L24/86 ,  H01L2224/50 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  Y10T29/49146 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Semiconductor chip packages and methods of fabricating the same. The package includes a thermally conductive protective structure having an indentation open to a front side and a flange surface at least partially surrounding the indentation and facing to the front of the structure. A chip is disposed in the indentation so that the front surface of the chip, with contacts thereon, faces toward the front of the structure. A flexible dielectric film having terminals thereon is placed on the flange surface, and a compliant material is disposed between the film and the flange surface. The terminals on the film are connected to the contacts on the chip. The individual terminals on the film are movable with respect to the protective structure, which facilitates mounting and compensation for thermal expansion.

Abstract translation: 半导体芯片封装及其制造方法。 该封装包括导热保护结构，其具有向前侧开口的凹口和至少部分地围绕凹口并面向结构前部的凸缘表面。 芯片设置在凹陷中，使得具有触点的芯片的前表面朝向结构的前部。 其上具有端子的柔性电介质膜放置在凸缘表面上，并且柔性材料设置在膜和凸缘表面之间。 胶片上的端子连接到芯片上的触点。 胶片上的各个端子相对于保护结构是可移动的，这有助于热膨胀的安装和补偿。

公开(公告)号：US20020184758A1

公开(公告)日：2002-12-12

申请号：US10210811

申请日：2002-08-01

Applicant: Tessera, Inc.

Inventor： Thomas H. DiStefano

IPC: H01R043/00 ,  H01R043/02

CPC classification number: H01L21/568 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/16 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3157 ,  H01L23/495 ,  H01L23/49572 ,  H01L23/4985 ,  H01L24/32 ,  H01L24/50 ,  H01L24/83 ,  H01L24/86 ,  H01L24/97 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/83191 ,  H01L2224/83855 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01009 ,  H01L2924/01018 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  Y10T29/49004 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49169 ,  Y10T29/49174 ,  Y10T29/49179 ,  Y10T29/49821 ,  H01L2224/83 ,  H01L2224/05599

Abstract: A method of making a microelectronic package includes providing a first microelectronic element having electrically conductive parts and including first and second surfaces and providing a compliant element including a releasable adhesive over the first surface of the first microelectronic element. A second microelectronic element having electrically conductive parts is abutted against the releasable adhesive so that the second microelectronic element is releasably assembled to the first microelectronic element and the electrically conductive parts of the first and second microelectronic elements are connected to one another. The releasably assembled package is tested to determine whether the package has been properly assembled. A curable liquid is then introduced between the first and second microelectronic elements of a properly assembled package and the curable liquid is cured to permanently assemble the first and second microelectronic elements together.

Abstract translation: 制造微电子封装的方法包括提供具有导电部分并包括第一和第二表面的第一微电子元件，并提供在第一微电子元件的第一表面上包括可释放粘合剂的柔顺元件。 具有导电部件的第二微电子元件抵靠可释放的粘合剂，使得第二微电子元件可释放地组装到第一微电子元件，并且第一和第二微电子元件的导电部件彼此连接。 对可拆卸组装的包装进行测试以确定包装是否已正确组装。 然后将可固化液体引入正确组装的包装的第一和第二微电子元件之间，并且可固化液体被固化以将第一和第二微电子元件永久地组装在一起。

公开(公告)号：US20020155728A1

公开(公告)日：2002-10-24

申请号：US10164116

申请日：2002-06-05

Applicant: Tessera, Inc.

Inventor： Igor Y. Khandros ,  Thomas H. DiStefano

IPC: H01L021/31

CPC classification number: H01L22/32 ,  H01L21/6836 ,  H01L21/822 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3164 ,  H01L23/485 ,  H01L23/49805 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/49861 ,  H01L24/27 ,  H01L24/48 ,  H01L24/81 ,  H01L25/16 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2224/05599 ,  H01L2224/16145 ,  H01L2224/274 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/81801 ,  H01L2224/8547 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06579 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Semiconductor chip assemblies incorporating flexible, sheet-like elements having terminals thereon overlying the front or rear face of the chip to provide a compact unit. The terminals on the sheet-like element are movable with respect to the chip, so as to compensate for thermal expansion. A resilient element such as a compliant layer interposed between the chip and terminals permits independent movement of the individual terminals toward the chip driving engagement with a test probe assembly so as to permit reliable engagement despite tolerances.

Abstract translation: 半导体芯片组件包括柔性的片状元件，其具有覆盖在芯片的前表面或后表面上的端子，以提供紧凑的单元。 片状元件上的端子可相对于芯片移动，以补偿热膨胀。 诸如插入在芯片和端子之间的柔性层的弹性元件允许各个端子朝向与测试探针组件的芯片驱动接合的独立移动，以允许尽可能公差地进行可靠的接合。

公开(公告)号：US20020179325A1

公开(公告)日：2002-12-05

申请号：US10200941

申请日：2002-07-23

Applicant: Tessera, Inc.

Inventor： Thomas H. DiStefano ,  Joseph Fjelstad

IPC: H05K001/03 ,  H01R012/04

CPC classification number: H05K3/462 ,  H01L23/49827 ,  H01L23/5385 ,  H01L2924/0002 ,  H01R12/523 ,  H01R12/714 ,  H01R13/2414 ,  H01R43/0256 ,  H05K1/0272 ,  H05K1/036 ,  H05K1/056 ,  H05K1/116 ,  H05K3/0032 ,  H05K3/326 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0195 ,  H05K2201/0382 ,  H05K2201/0397 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10378 ,  H05K2203/0554 ,  H05K2203/0582 ,  H05K2203/135 ,  H05K2203/308 ,  Y10T29/49126 ,  Y10T29/49133 ,  Y10T29/49137 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T156/1744 ,  H01L2924/00

Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact extends from a central conductor, and has a peripheral portion adapted to contract radially inwardly toward the central conductor response to a force applied by a contact pad defining a central hole on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts contract radially inwardly and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by friction welding, or by a conductive bonding material carried on the contacts themselves.

Abstract translation: 用于微电子电路板之间的互连的插入件在其表面具有接触。 每个接触件从中心导体延伸，并且具有适于从中心导体径向向内收缩的外围部分，以响应由在所接合的电路板上限定中心孔的接触垫施加的力。 因此，当电路板被内插件压缩时，触头径向向内收缩并且擦拭穿过焊盘。 擦拭动作有助于通过摩擦焊接将接触件接合到焊盘，或者通过接触件本身承载的导电接合材料。

公开(公告)号：US20040262742A1

公开(公告)日：2004-12-30

申请号：US10876897

申请日：2004-06-25

Applicant: Tessera, Inc.

Inventor： Thomas H. DiStefano ,  John W. Smith ,  Tony Faraci

IPC: H01L023/10 ,  H01L023/34 ,  H01L023/02 ,  H01L023/04

CPC classification number: H01L21/4839 ,  H01L23/22 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/642 ,  H01L24/72 ,  H01L2224/16225 ,  H01L2224/45124 ,  H01L2224/73253 ,  H01L2224/81904 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/351 ,  H05K1/118 ,  H05K3/361 ,  H05K3/4084 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2203/063 ,  H01L2924/00 ,  H01L2224/48

Abstract: A packaged semiconductor chip including the chip, and a package element such as a heat sink is made by connecting flexible leads between contacts on the chip and terminals on a dielectric element such as a sheet or plate and moving the sheet or plate away from the chip, and injecting a liquid material to form a compliant layer filling the space between the package element and the dielectric element, and surrounding the leads. The dielectric element and package element extend outwardly beyond the edges of the chip, and physically protect the chip. The assembly may be handled and mounted by conventional surface mounting techniques. The assembly may include additional circuit elements such as capacitors used in conjunction with the chip.

Abstract translation: 包括芯片的封装半导体芯片和诸如散热器的封装元件通过将芯片上的触点之间的柔性引线和诸如片材或板之类的电介质元件上的端子连接并将片或板远离芯片 并且注入液体材料以形成填充封装元件和电介质元件之间的空间并且围绕引线的柔性层。 介质元件和封装元件向外延伸超过芯片的边缘，并物理保护芯片。 组件可以通过常规的表面安装技术来处理和安装。 组件可以包括附加电路元件，例如与芯片结合使用的电容器。

公开(公告)号：US20040045159A1

公开(公告)日：2004-03-11

申请号：US10658941

申请日：2003-09-10

Applicant: Tessera, Inc.

Inventor： Thomas H. DiStefano ,  Joseph Fjelstad

IPC: C09J001/00

CPC classification number: H05K3/462 ,  H01L23/49827 ,  H01L23/5385 ,  H01L2924/0002 ,  H01R12/523 ,  H01R12/714 ,  H01R13/2414 ,  H01R43/0256 ,  H05K1/0272 ,  H05K1/036 ,  H05K1/056 ,  H05K1/116 ,  H05K3/0032 ,  H05K3/326 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0195 ,  H05K2201/0382 ,  H05K2201/0397 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10378 ,  H05K2203/0554 ,  H05K2203/0582 ,  H05K2203/135 ,  H05K2203/308 ,  Y10T29/49126 ,  Y10T29/49133 ,  Y10T29/49137 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T156/1744 ,  H01L2924/00

Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact extends from a central conductor, and has a peripheral portion adapted to contract radially inwardly toward the central conductor response to a force applied by a contact pad defining a central hole on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts contract radially inwardly and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by friction welding, or by a conductive bonding material carried on the contacts themselves.

公开(公告)号：US20020151111A1

公开(公告)日：2002-10-17

申请号：US10162957

申请日：2002-06-05

Applicant: Tessera, Inc.

Inventor： Thomas H. DiStefano ,  Gary W. Grube ,  Igor Y. Khandros ,  Gaetan Mathieu ,  Jason Sweis ,  Laurie Union ,  David Gibson

IPC: H01L021/60 ,  H01L023/12

CPC classification number: H01L24/86 ,  H01L23/3107 ,  H01L23/49572 ,  H01L24/50 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/00

Abstract: A semiconductor chip mounting component includes a support having a top surface, a bottom surface, a central portion, a peripheral portion surrounding the central portion, and a gap extending through the support structure between the top and bottom. The component includes a plurality of electrically conductive leads, each lead having a connection section extending across the gap, the connection section having a first end disposed on the support structure on one side of the gap, a second end secured to the support structure on an opposite side of the gap, and a frangible section between the first and second ends. The component also includes at least one elongated bus disposed on the peripheral portion of the support structure alongside the gap, whereby each lead extends across the gap and is connected to the bus.

Abstract translation: 半导体芯片安装部件包括具有顶表面，底表面，中心部分，围绕中心部分的周边部分以及在顶部和底部之间延伸穿过支撑结构的间隙的支撑件。 所述部件包括多个导电引线，每个引线具有跨越所述间隙延伸的连接部分，所述连接部分具有在所述间隙的一侧上设置在所述支撑结构上的第一端，在所述间隙的一侧固定到所述支撑结构的第二端 间隙的相对侧，以及第一和第二端之间的易碎部分。 该部件还包括至少一个细长总线，其沿着间隙设置在支撑结构的周边部分上，由此每个引线延伸穿过间隙并连接到总线。