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    Method of forming solid blind vias through the dielectric coating on high density interconnect (HDI) substrate materials
    1.
    发明授权
    Method of forming solid blind vias through the dielectric coating on high density interconnect (HDI) substrate materials 失效
    通过高密度互连（HDI）衬底材料上的电介质涂层形成固体盲孔的方法

    公开(公告)号：US08409982B2

    公开(公告)日：2013-04-02

    申请号：US13182838

    申请日：2011-07-14

    申请人： Kevin C. Olson ,  Alan E. Wang

    发明人： Kevin C. Olson ,  Alan E. Wang

    IPC分类号： H01L21/4763

    CPC分类号： H05K3/44 ,  H05K3/108 ,  H05K3/388 ,  H05K3/445 ,  H05K3/4647 ,  H05K2201/09554 ,  H05K2203/0582 ,  H05K2203/0733 ,  H05K2203/135

    摘要： A method includes forming a first substrate by (a) applying an electrodepositable dielectric coating onto a conductive surface; (b) curing the dielectric coating; (c) depositing an adhesion layer and a seed layer onto the dielectric coating; (d) applying a layer of a first removable material to the seed layer; (e) forming openings in the first removable material to expose areas of the seed layer; (f) electroplating a first conductive material to the exposed areas of the seed layer; (g) applying a layer of a second removable material; (h) forming openings in the second removable material to expose areas of the first conductive material; (i) plating a second conductive material to the exposed areas of the first conductive material; (j) removing the first and second removable materials; (k) removing unplated portions of the seed layer; repeating steps (a) through (k) to form a second substrate; and laminating the first and second substrates together with a layer of dielectric material between the first and second substrates to form at least one interconnect between the first and second substrates.

    摘要翻译： 一种方法包括通过以下步骤形成第一衬底：（a）将电沉积介电涂层施加到导电表面上; （b）固化电介质涂层; （c）在所述电介质涂层上沉积粘附层和种子层; （d）将第一可移除材料层施加到种子层; （e）在第一可移除材料中形成开口以暴露种子层的区域; （f）将第一导电材料电镀到种子层的暴露区域; （g）施加第二可移除材料层; （h）在所述第二可移除材料中形成开口以暴露所述第一导电材料的区域; （i）将第二导电材料镀覆到第一导电材料的暴露区域; （j）移除第一和第二可移除材料; （k）去除种子层的未镀层的部分; 重复步骤（a）至（k）以形成第二衬底; 以及将所述第一和第二基板与第一和第二基板之间的介电材料层一起层压，以在所述第一和第二基板之间形成至少一个互连。

    Embedded capacitor, embedded capacitor sheet using the same and method of manufacturing the same
    2.
    发明授权
    Embedded capacitor, embedded capacitor sheet using the same and method of manufacturing the same 有权
    嵌入式电容器，嵌入式电容器片采用相同的制造方法

    公开(公告)号：US08274779B2

    公开(公告)日：2012-09-25

    申请号：US12453635

    申请日：2009-05-18

    申请人： Jung Rag Yoon ,  Kyung Min Lee ,  Jeong Woo Han

    发明人： Jung Rag Yoon ,  Kyung Min Lee ,  Jeong Woo Han

    IPC分类号： H01G4/06 ,  H01G4/20 ,  H01G4/005 ,  H01G4/38

    CPC分类号： H01G4/33 ,  H01G4/01 ,  H01G4/1209 ,  H01G4/1218 ,  H05K1/162 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0257 ,  H05K2201/0373 ,  H05K2203/135

    摘要： Provided are an embedded capacitor, an embedded capacitor sheet using the embedded capacitor, and a method of manufacturing the same that may increase a surface area to thereby increase a capacity for each unit area and may provide an embedded capacitor in a sheet to thereby readily lay the embedded capacitor on an embedded printed circuit board. The embedded capacitor may include: a common electrode member 11 including a plurality of grooves 11a; a sealing dielectric layer 12 being formed by sealing a nano dielectric powder with a high dielectric constant in the plurality of grooves 11a formed in the common electrode member 11; a buffer dielectric layer 13 sealing and smoothing an uneven portion of the sealing dielectric layer 12 by applying a paste or a slurry including epoxy of 20 Vol % through 80 Vol % and dielectric powder of 20 Vol % through 80 Vol % with respect to the sealing dielectric layer 12; and an individual electrode member 14 being formed on the buffer dielectric layer 13.

    摘要翻译： 提供了嵌入式电容器，使用嵌入式电容器的嵌入式电容器片及其制造方法，其可以增加表面积从而增加每个单位面积的容量，并且可以在片材中提供嵌入式电容器，从而容易地铺设 嵌入式电路板上的嵌入式电容器。 嵌入式电容器可以包括：公共电极构件11，其包括多个槽11a; 密封电介质层12通过在形成在公共电极构件11中的多个槽11a中密封具有高介电常数的纳米介电粉末而形成; 缓冲电介质层13，通过将包含20体积％〜80体积％的环氧树脂的糊剂或包含20体积％〜80体积％的电介质粉末的密封，密封介质层12的不均匀部分密封并平滑， 电介质层12; 以及形成在缓冲介电层13上的单独电极部件14。

    Process of fabricating a circuit board
    4.
    发明授权
    Process of fabricating a circuit board 有权
    制造电路板的工艺

    公开(公告)号：US07743494B2

    公开(公告)日：2010-06-29

    申请号：US11972671

    申请日：2008-01-11

    申请人： Alan E. Wang ,  Kevin C. Olson ,  Michael J. Pawlik

    发明人： Alan E. Wang ,  Kevin C. Olson ,  Michael J. Pawlik

    IPC分类号： H01K3/10

    CPC分类号： H05K3/429 ,  H01L2924/0002 ,  H05K3/445 ,  H05K3/4641 ,  H05K2201/09309 ,  H05K2203/135 ,  Y10T29/49126 ,  Y10T29/49165 ,  H01L2924/00

    摘要： A process for fabricating a circuit board includes: providing a substrate including a first electrically conductive core having a first insulating coating on a first side and a second insulating coating on a second side, forming an opening in the first and second insulating coatings and the first electrically conductive core, exposing an edge of the conductive core within the opening, and electrodepositing a third insulating material on the exposed edge of the first electrically conductive core. A circuit board fabricated using the process is also provided.

    摘要翻译： 一种电路板的制造方法，包括：提供包括第一导电芯的基板，第一导电芯在第一侧具有第一绝缘涂层，在第二侧具有第二绝缘涂层，在第一绝缘涂层和第二绝缘涂层中形成开口 导电芯，将导电芯的边缘暴露在开口内，以及在第一导电芯的暴露边缘上电沉积第三绝缘材料。 还提供了使用该方法制造的电路板。

    Circuit board and method of manufacture thereof
    6.
    发明授权
    Circuit board and method of manufacture thereof 失效
    电路板及其制造方法

    公开(公告)号：US07679001B2

    公开(公告)日：2010-03-16

    申请号：US11565715

    申请日：2006-12-01

    申请人： Alan E. Wang ,  Kevin C. Olson ,  Thomas H. DiStefano

    发明人： Alan E. Wang ,  Kevin C. Olson ,  Thomas H. DiStefano

    IPC分类号： H05K1/03

    CPC分类号： H05K1/0231 ,  H01L2224/16225 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/44 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2201/0397 ,  H05K2201/0909 ,  H05K2201/0919 ,  H05K2201/09309 ,  H05K2201/09554 ,  H05K2201/10446 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

    摘要： Provided is a method of forming a circuit board including (a) providing a first conductive sheet; (b) selectively removing one or more portions of the first conductive sheet to form a first panel having a first circuit board that is coupled to a disposable part of the first panel by at least one tab that extends from an edge of the first circuit board to an edge of the disposable part of the first panel; (c) applying an insulating coating to the first circuit board so that at least each edge of the first circuit board is covered thereby; and (d) separating the first circuit board from the disposable part in a manner whereupon at least part of the tab remains attached to the first circuit board and includes an exposed edge of the conductive sheet of the first circuit board. Circuit boards formed by the method are also provided.

    摘要翻译： 提供一种形成电路板的方法，包括：（a）提供第一导电片; （b）选择性地去除所述第一导电片的一个或多个部分以形成具有第一电路板的第一面板，所述第一电路板通过从所述第一电路板的边缘延伸的至少一个接片连接到所述第一面板的一次性部分 到所述第一面板的一次性部分的边缘; （c）向第一电路板施加绝缘涂层，使得第一电路板的至少每个边缘被覆盖; 以及（d）以一种方式将第一电路板与一次性部分分开，由此至少部分突片保持附接到第一电路板并且包括第一电路板的导电片的暴露边缘。 还提供了通过该方法形成的电路板。

    Producing method of wired circuit board
    7.
    发明授权
    Producing method of wired circuit board 失效
    有线电路板的生产方法

    公开(公告)号：US07557049B2

    公开(公告)日：2009-07-07

    申请号：US11976234

    申请日：2007-10-23

    申请人： Jun Ishii ,  Yasunari Ooyabu ,  Hiroyuki Kurai

    发明人： Jun Ishii ,  Yasunari Ooyabu ,  Hiroyuki Kurai

    IPC分类号： H01L21/31

    CPC分类号： H05K1/0259 ,  H05K3/28 ,  H05K2201/0329 ,  H05K2203/135

    摘要： A producing method of a wired circuit board includes the step of preparing a wired circuit board including an insulating layer and a conductive pattern having a wire covered with the insulating layer and a terminal portion exposed from the insulating layer; and the step of forming a semiconductive layer on a surface of the insulating layer by dipping the wired circuit board in a polymeric liquid of a conductive polymer in which an electrode is provided, and applying a voltage so that the electrode becomes an anode and the conductive pattern becomes a cathode.

    摘要翻译： 一种布线电路板的制造方法，其特征在于，包括：制作布线电路基板的步骤，所述布线电路基板包括绝缘层和具有被绝缘层覆盖的导线的导电图案和从所述绝缘层露出的端子部分; 以及通过将布线电路板浸渍在其中提供电极的导电聚合物的聚合物液体中并且施加电压使得电极变为阳极并且导电的方式在绝缘层的表面上形成半导体层的步骤 图案变成阴极。

    METHOD OF FORMING SOLID BLIND VIAS THROUGH THE DIELECTRIC COATING ON HIGH DENSITY INTERCONNECT SUBSTRATE MATERIALS
    9.
    发明申请
    METHOD OF FORMING SOLID BLIND VIAS THROUGH THE DIELECTRIC COATING ON HIGH DENSITY INTERCONNECT SUBSTRATE MATERIALS 失效
    在高密度互连衬底材料上通过电介质涂层形成固体黑色VIAS的方法

    公开(公告)号：US20080305626A1

    公开(公告)日：2008-12-11

    申请号：US11760804

    申请日：2007-06-11

    申请人： Kevin C. Olson ,  Alan E. Wang

    发明人： Kevin C. Olson ,  Alan E. Wang

    IPC分类号： H01L21/4763

    CPC分类号： H05K3/44 ,  H05K3/108 ,  H05K3/388 ,  H05K3/445 ,  H05K3/4647 ,  H05K2201/09554 ,  H05K2203/0582 ,  H05K2203/0733 ,  H05K2203/135

    摘要： A method is provided comprising: coating an electrically conductive core with a first removable material, creating openings in the first removable material to expose portions of the electrically conductive core, plating a conductive material onto the exposed portions of the electrically conductive core, coating the conductive material with a second removable material, removing the first removable material, electrophoretically coating the electrically conductive core with a dielectric coating, and removing the second removable material.

    摘要翻译： 提供了一种方法，包括：用第一可移除材料涂覆导电芯，在第一可移除材料中形成开口以暴露部分导电芯，将导电材料镀在导电芯的暴露部分上， 具有第二可移除材料的材料，去除第一可移除材料，用电介质涂层电泳涂覆导电芯，以及去除第二可除去材料。

    METHOD FOR MAKING A CIRCUIT BOARD AND MULTI-LAYER SUBSTRATE WITH PLATED THROUGH HOLES
    10.
    发明申请
    METHOD FOR MAKING A CIRCUIT BOARD AND MULTI-LAYER SUBSTRATE WITH PLATED THROUGH HOLES 审中-公开
    制造电路板和多层衬底的方法

    公开(公告)号：US20080271915A1

    公开(公告)日：2008-11-06

    申请号：US11941787

    申请日：2007-11-16

    申请人： Chien Hao WANG

    发明人： Chien Hao WANG

    IPC分类号： H01R12/04 ,  H05K3/36

    CPC分类号： H05K1/0219 ,  H05K3/429 ,  H05K3/4623 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09809 ,  H05K2203/135 ,  Y10T29/49126

    摘要： A method for making a circuit board includes the following steps. At least two substrates are provided, wherein each substrate includes two surfaces, two circuit layers respective formed on the two surfaces and at least a via passing through the two surfaces. A metal layer is formed on the side wall of the via, wherein the metal layer electrically connects two circuit layers on the two surfaces of each substrate to each other. An insulating film is at least formed on the surface of the metal layer by an electrophoretic deposition process. Vias of two substrates are aligned with each other and two substrates are laminated to each other, so as to form a multi-layer substrate. Another metal layer is formed on the insulating film, wherein each metal layer is an independent electrical channel.

    摘要翻译： 制造电路板的方法包括以下步骤。 提供至少两个基板，其中每个基板包括两个表面，两个电路层分别形成在两个表面上，并且至少一个通孔穿过两个表面。 在通孔的侧壁上形成金属层，其中金属层将每个基板的两个表面上的两个电路层彼此电连接。 至少通过电泳沉积工艺在金属层的表面上形成绝缘膜。 两个基板的通孔彼此对准，并且将两个基板彼此层叠，以形成多层基板。 在绝缘膜上形成另一金属层，其中每个金属层是独立的电通道。