公开(公告)号：US10535646B2

公开(公告)日：2020-01-14

申请号：US16220174

申请日：2018-12-14

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shih-Ming Chang ,  Ming-Feng Shieh ,  Ru-Gun Liu ,  Tsai-Sheng Gau

IPC分类号： H01L27/02 ,  H01L23/522 ,  H01L21/768 ,  H01L21/308 ,  H01L21/033 ,  H01L29/06 ,  H01L21/3213

摘要： Methods disclosed herein form semiconductor devices having minimum spacings that correlate with spacer widths. An exemplary method includes forming a target layer over a substrate, forming a patterning layer over the target layer, and etching the target layer using the patterning layer as an etch mask. The patterning layer includes a first pattern feature, a second pattern feature spaced a first distance (corresponding with a first width of a first spacer fabricated during a first spacer patterning process) from the first pattern feature, and a third pattern feature spaced a second distance (corresponding with a second width of a second spacer fabricated during a second spacer patterning process) from the first pattern feature and a third distance (corresponding with a third width of a third spacer formed during the second spacer patterning process) from the second pattern feature.

公开(公告)号：US10276363B2

公开(公告)日：2019-04-30

申请号：US15698936

申请日：2017-09-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shih-Ming Chang ,  Ming-Feng Shieh ,  Chih-Ming Lai ,  Ru-Gun Liu ,  Tsai-Sheng Gau

IPC分类号： H01L21/02 ,  H01L21/308 ,  G03F7/20 ,  G03F1/00 ,  H01L29/66 ,  H01L27/12 ,  H01L21/84 ,  H01L21/8234 ,  H01L21/768 ,  H01L21/3213 ,  H01L21/311 ,  H01L21/3065 ,  H01L21/306 ,  H01L21/302 ,  H01L21/033

摘要： The present disclosure provides a method for forming patterns in a semiconductor device. The method includes providing a substrate and a patterning-target layer over the substrate; patterning the patterning-target layer to form a main pattern; forming a middle layer over the patterning-target layer and a hard mask layer over the middle layer; patterning the hard mask layer to form a first cut pattern; patterning the hard mask layer to form a second cut pattern, a combined cut pattern being formed in the hard mask layer as a union of the first cut pattern and the second cut pattern; transferring the combined cut pattern to the middle layer; etching the patterning-target layer using the middle layer as an etching mask to form a final pattern in the patterning-target layer. In some embodiments, the final pattern includes the main pattern subtracting an intersection portion between main pattern and the combined cut pattern.

公开(公告)号：US10249570B2

公开(公告)日：2019-04-02

申请号：US16048018

申请日：2018-07-27

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chen-Yu Chen ,  Ming-Feng Shieh ,  Ching-Yu Chang

IPC分类号： H01L23/544 ,  H01L29/06 ,  G03F7/20 ,  H01L21/302 ,  H01L29/78

摘要： An overlay mark includes a first feature of a plurality of first alignment segments extending along a first direction in a first layer, a second feature of a plurality of second alignment segments extending along a second direction in a second layer over the first layer, and a third feature of a plurality of third alignment segments extending along the first direction and a plurality of fourth alignment segments extending along the second direction in a third layer over the second layer. In a plan view, each first alignment segment of the plurality of first alignment segments is adjacent to a corresponding third alignment segment of the plurality of third alignment segments along the first direction, and each second alignment segment of the plurality of second alignment segments is adjacent to a corresponding forth alignment segment of the plurality of fourth alignment segments along the second direction.

公开(公告)号：US10049885B2

公开(公告)日：2018-08-14

申请号：US15012205

申请日：2016-02-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hoi-Tou Ng ,  Kuei-Liang Lu ,  Ming-Feng Shieh ,  Ru-Gun Liu

IPC分类号： H01L21/308 ,  H01L21/033 ,  H01L21/84 ,  H01L27/12 ,  H01L21/8234 ,  H01L21/027

摘要： A method for patterning fins for FinFET devices are disclosed. The method includes forming elongated protrusions on a semiconductor substrate and forming a mask covering a first portion of the elongated protrusions. The method further includes forming a spacer surrounding the mask. The mask and the spacer together cover a second portion of the elongated protrusions. The method further includes removing a portion of the elongated protrusions not covered by the mask and the spacer. In an embodiment, an outer boundary of the spacer and the mask corresponds to an outer boundary of a non-rectangular pattern.

公开(公告)号：US10043759B2

公开(公告)日：2018-08-07

申请号：US14551653

申请日：2014-11-24

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chen-Yu Chen ,  Ming-Feng Shieh ,  Ching-Yu Chang

IPC分类号： H01L23/544 ,  G03F7/20 ,  H01L21/302 ,  H01L29/06 ,  H01L29/78

摘要： An overlay mark comprises a first feature in a first layer. The first feature has a length extending in a first longitudinal direction and a width extending in a second longitudinal direction. The length of the first feature is greater than the width of the first feature. The overlay mark also comprises a second feature in a second layer over the first layer. The second feature has a length extending in the second longitudinal direction and a width extending in the first longitudinal direction. The length of the second feature is greater than the width of the second feature. The overlay mark further comprises a third feature in a third layer over the second layer. The third feature is a box-shaped opening in the third layer.

公开(公告)号：US09673328B2

公开(公告)日：2017-06-06

申请号：US14586602

申请日：2014-12-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shao-Ming Yu ,  Chang-Yun Chang ,  Chih-Hao Chang ,  Hsin-Chih Chen ,  Kai-Tai Chang ,  Ming-Feng Shieh ,  Kuei-Liang Lu ,  Yi-Tang Lin

IPC分类号： H01L29/49 ,  H01L29/78 ,  H01L27/088 ,  H01L29/66 ,  H01L21/67 ,  H01L21/8234

CPC分类号： H01L29/785 ,  H01L21/67248 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823437 ,  H01L27/0886 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7842

摘要： A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.

公开(公告)号：US09581900B2

公开(公告)日：2017-02-28

申请号：US14753523

申请日：2015-06-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ming-Feng Shieh ,  Chih-Ming Lai ,  Ken-Hsien Hsieh ,  Ru-Gun Liu ,  Shih-Ming Chang

IPC分类号： G03F7/20 ,  G03F7/00 ,  H01L21/033 ,  G03F7/40

CPC分类号： G03F7/0035 ,  G03F7/20 ,  G03F7/40 ,  H01L21/0337

摘要： A method for using self aligned multiple patterning with multiple resist layers includes forming a first patterned resist layer onto a substrate, forming a spacer layer on top of the first patterned resist layer such that spacer forms on side walls of features of the first resist layer, and forming a second patterned resist layer over the spacer layer and depositing a masking layer. The method further includes performing a planarizing process to expose the first patterned resist layer, removing the first resist layer, removing the second resist layer, and exposing the substrate.

摘要翻译： 使用具有多个抗蚀剂层的自对准多重图案化的方法包括在衬底上形成第一图案化抗蚀剂层，在第一图案化抗蚀剂层的顶部上形成间隔层，使得间隔物形成在第一抗蚀剂层的特征的侧壁上， 以及在所述间隔层上形成第二图案化抗蚀剂层并沉积掩模层。 该方法还包括执行平面化处理以暴露第一图案化抗蚀剂层，去除第一抗蚀剂层，去除第二抗蚀剂层以及使基板曝光。

公开(公告)号：US09502261B2

公开(公告)日：2016-11-22

申请号：US14850764

申请日：2015-09-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ru-Gun Liu ,  Cheng-Hsiung Tsai ,  Chung-Ju Lee ,  Chih-Ming Lai ,  Chia-Ying Lee ,  Jyu-Horng Shieh ,  Ken-Hsien Hsieh ,  Ming-Feng Shieh ,  Shau-Lin Shue ,  Shih-Ming Chang ,  Tien-I Bao ,  Tsai-Sheng Gau

IPC分类号： H01L21/308 ,  H01L21/033 ,  H01L21/311 ,  H01L21/768 ,  H01L21/02 ,  H01L21/027 ,  H01L21/3105

CPC分类号： H01L21/3086 ,  H01L21/0217 ,  H01L21/02186 ,  H01L21/02282 ,  H01L21/0276 ,  H01L21/0337 ,  H01L21/3081 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/76816 ,  H01L21/823431

摘要： A method includes forming a first material layer on a substrate and performing a first patterning process using a first layout to form a first plurality of trenches in the first material layer. The method further includes performing a second patterning process using a second layout to form a second plurality of trenches in the first material layer, wherein the second layout a cut pattern for the first layout. The method further includes forming spacer features on sidewalls of both the first and second pluralities of trenches, wherein the spacer features have a thickness and the cut pattern corresponds to a first trench of the second plurality whose width is less than twice the thickness of the spacer features. The method further includes removing the first material layer; forming a second material layer on the substrate and within openings defined by the spacer features; and removing the spacer features.

摘要翻译： 一种方法包括在衬底上形成第一材料层，并使用第一布局进行第一图案化工艺以在第一材料层中形成第一多个沟槽。 该方法还包括使用第二布局执行第二图案化处理，以在第一材料层中形成第二多个沟槽，其中第二布局是用于第一布局的切割图案。 该方法还包括在第一和第二多个沟槽的侧壁上形成间隔物特征，其中间隔物特征具有厚度，并且切割图案对应于第二多个沟槽的宽度小于间隔物厚度的两倍的第一沟槽 特征。 该方法还包括去除第一材料层; 在衬底上并在由间隔物特征限定的开口内形成第二材料层; 并移除垫片特征。

公开(公告)号：US09443768B2

公开(公告)日：2016-09-13

申请号：US14710995

申请日：2015-05-13

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ming-Feng Shieh ,  Hung-Chang Hsieh ,  Han-Wei Wu

IPC分类号： H01L21/76 ,  H01L21/8234 ,  H01L21/308 ,  H01L21/306 ,  H01L21/3105 ,  H01L29/66

CPC分类号： H01L21/823431 ,  H01L21/30604 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/31055 ,  H01L21/823821 ,  H01L21/845 ,  H01L29/66545 ,  H01L29/66795

摘要： A method of fabricating a fin-like field-effect transistor (FinFET) device includes providing a substrate having a first region and a second region, and forming a plurality of mandrel features in the first region with a first spacing. The method further includes forming first spacers along sidewalls of the mandrel features with a targeted width A, and forming second spacers with a first width W1 along sidewalls of the first spacers, wherein two back-to-back adjacent second spacers are separated by a gap. The method further includes depositing a dielectric material in the gap and in the second region, and performing a first cut thereby removing a first subset of the first spacers. Coincident with the removing of the first subset, the method further includes partially removing the dielectric material in the second region thereby forming a mesa of the dielectric material in the second region.

摘要翻译： 制造鳍状场效应晶体管（FinFET）器件的方法包括提供具有第一区域和第二区域的衬底，并且以第一间隔在第一区域中形成多个心轴特征。 该方法还包括沿目标宽度A的心轴特征的侧壁形成第一间隔物，以及沿着第一间隔物的侧壁形成具有第一宽度W1的第二间隔物，其中两个背对背相邻的第二间隔物被间隙间隔开 。 该方法还包括在间隙和第二区域中沉积电介质材料，并且执行第一切割，从而去除第一间隔物的第一子集。 与去除第一子集重合，该方法还包括部分去除第二区域中的介电材料，从而在第二区域中形成电介质材料的台面。

公开(公告)号：US20160190070A1

公开(公告)日：2016-06-30

申请号：US15063997

申请日：2016-03-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ming-Feng Shieh ,  Ya Hui Chang ,  Ru-Gun Liu ,  TSONG-HUA OU ,  Ken-Hsien Hsieh ,  Burn Jeng Lin

IPC分类号： H01L23/544 ,  H01L21/033

CPC分类号： H01L23/544 ,  G03F1/42 ,  G03F9/7076 ,  H01L21/0337 ,  H01L21/0338 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided is an alignment mark having a plurality of sub-resolution elements. The sub-resolution elements each have a dimension that is less than a minimum resolution that can be detected by an alignment signal used in an alignment process. Also provided is a semiconductor wafer having first, second, and third patterns formed thereon. The first and second patterns extend in a first direction, and the third pattern extend in a second direction perpendicular to the first direction. The second pattern is separated from the first pattern by a first distance measured in the second direction. The third pattern is separated from the first pattern by a second distance measured in the first direction. The third pattern is separated from the second pattern by a third distance measured in the first direction. The first distance is approximately equal to the third distance. The second distance is less than twice the first distance.

摘要翻译： 提供具有多个次分辨率元素的对准标记。 子分辨率元素各自具有小于可由对准过程中使用的对准信号检测的最小分辨率的维度。 还提供了其上形成有第一，第二和第三图案的半导体晶片。 第一和第二图案在第一方向上延伸，并且第三图案沿垂直于第一方向的第二方向延伸。 第二图案与第一图案分离在第二方向上测量的第一距离。 第三图案与第一图案分离在第一方向上测量的第二距离。 第三图案与第二图案分离在第一方向上测量的第三距离。 第一距离近似等于第三距离。 第二距离小于第一距离的两倍。