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公开(公告)号:US20220367664A1
公开(公告)日:2022-11-17
申请号:US17814175
申请日:2022-07-21
发明人: Yi-Chun Chen , Tsung Fan Yin , Li-Te Hsu , Ying Ting Hsia , Yi-Wei Chiu
摘要: A method of forming a gate structure includes forming an opening through an insulating layer and forming a first work function metal layer in the opening. The method also includes recessing the first work function metal layer into the opening to form a recessed first work function metal layer, and forming a second work function metal layer in the opening and over the first work function metal layer. The second work function metal layer lines and overhangs the recessed first work function metal layer.
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公开(公告)号:US11056358B2
公开(公告)日:2021-07-06
申请号:US16100635
申请日:2018-08-10
发明人: Jieh-Chau Huang , Bi-Ming Yen , Hung-Lung Hu , Ying Ting Hsia , Ping-Jung Huang , Pei Yen Hsia
IPC分类号: H01L21/67 , H01L21/673 , H01L21/687
摘要: The present disclosure describes an apparatus for wafer cleaning. The apparatus includes an enclosure made of a noncombustible material, a wafer holder, a cleaning nozzle, at least one sensor, and an exhaust unit. The wafer holder can hold and heat a wafer. The cleaning nozzle can supply a flow of a cleaning fluid onto a surface of the wafer. The at least one sensor can detect attributes of the wafer. The exhaust unit can expel a vapor generated by the cleaning fluid in the enclosure. The exhaust unit can include a rinse nozzle to rinse the vapor passing through the exhaust unit with a mist.
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公开(公告)号:US20170278972A1
公开(公告)日:2017-09-28
申请号:US15080551
申请日:2016-03-24
发明人: Ying Ting Hsia , Kun Yu Lin , Ying Ming Wang , Li-Te Hsu
CPC分类号: H01L29/7853 , H01L29/0847 , H01L29/165 , H01L29/66795 , H01L29/66818 , H01L29/7848 , H01L29/785
摘要: Semiconductor devices, FinFET devices with optimized strained-source-drain recess profiles and methods of forming the same are provided. One of the semiconductor devices includes a substrate, a gate stack over the substrate and a strained layer in a recess of the substrate and aside the gate stack. Besides, a ratio of a depth at the greatest width of the recess to a width of the gate stack ranges from about 0.5 to 0.7.
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公开(公告)号:US20240021446A1
公开(公告)日:2024-01-18
申请号:US18362271
申请日:2023-07-31
发明人: Jieh-Chau HUANG , Ying Ting Hsia , Ping-Jung Huang , Pei Yen Hsia , Bi-Ming Yen , Hung-Lung Hu
IPC分类号: H01L21/67 , H01L21/673 , H01L21/687
CPC分类号: H01L21/67051 , H01L21/67288 , H01L21/67393 , H01L21/67253 , H01L21/6875 , H01L21/67248 , H01L21/68728 , H01L21/6719
摘要: The present disclosure relates to an apparatus for wafer cleaning. The apparatus includes an enclosure made of a noncombustible material, a wafer holder, a cleaning nozzle, at least one sensor, and an exhaust unit. The wafer holder can hold and heat a wafer. The cleaning nozzle can supply a flow of a cleaning fluid onto a surface of the wafer. The at least one sensor can detect attributes of the wafer. The exhaust unit can expel a vapor generated by the cleaning fluid in the enclosure. The exhaust unit can include a rinse nozzle to rinse the vapor passing through the exhaust unit with a mist.
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公开(公告)号:US11088025B2
公开(公告)日:2021-08-10
申请号:US16883508
申请日:2020-05-26
发明人: Yun-Yu Hsieh , Jeng Chang Her , Cha-Hsin Chao , Yi-Wei Chiu , Li-Te Hsu , Ying Ting Hsia
IPC分类号: H01L21/768 , H01L29/78 , H01L29/66 , H01L21/3213 , H01L29/417 , H01L21/311 , H01L23/485
摘要: A method of forming a semiconductor device includes forming a source/drain region on a substrate and forming a first interlayer dielectric (ILD) layer over the source/drain region. The method further includes forming a second ILD layer over the first ILD layer, forming a source/drain contact structure within the first ILD layer and the second ILD layer, and selectively removing a portion of the source/drain contact structure to form a concave top surface of the source/drain contact structure.
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公开(公告)号:US10679896B2
公开(公告)日:2020-06-09
申请号:US16140201
申请日:2018-09-24
发明人: Yun-Yu Hsieh , Jeng Chang Her , Cha-Hsin Chao , Yi-Wei Chiu , Li-Te Hsu , Ying Ting Hsia
IPC分类号: H01L21/768 , H01L29/78 , H01L29/66 , H01L21/3213 , H01L29/417 , H01L21/311 , H01L23/485
摘要: A method of forming a semiconductor device includes forming a source/drain region on a substrate and forming a first interlayer dielectric (ILD) layer over the source/drain region. The method further includes forming a first conductive region within the first ILD layer, selectively removing a portion of the first conductive region to form a concave top surface of the first conductive region. The method also includes forming a second ILD layer over the first ILD layer and forming a second conductive region within the second ILD layer and on the concave top surface. The concave top surface provides a large contact area, and hence reduced contact resistance between the first and second conductive regions.
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公开(公告)号:US10141443B2
公开(公告)日:2018-11-27
申请号:US15080551
申请日:2016-03-24
发明人: Ying Ting Hsia , Kun Yu Lin , Ying Ming Wang , Li-Te Hsu
摘要: Semiconductor devices, FinFET devices with optimized strained-source-drain recess profiles and methods of forming the same are provided. One of the semiconductor devices includes a substrate, a gate stack over the substrate and a strained layer in a recess of the substrate and aside the gate stack. Besides, a ratio of a depth at the greatest width of the recess to a width of the gate stack ranges from about 0.5 to 0.7.
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公开(公告)号:US12015070B2
公开(公告)日:2024-06-18
申请号:US17814175
申请日:2022-07-21
发明人: Yi-Chun Chen , Tsung Fan Yin , Li-Te Hsu , Ying Ting Hsia , Yi-Wei Chiu
CPC分类号: H01L29/4966 , H01L21/28088 , H01L29/66545 , H01L29/66795 , H01L29/785
摘要: A method of forming a gate structure includes forming an opening through an insulating layer and forming a first work function metal layer in the opening. The method also includes recessing the first work function metal layer into the opening to form a recessed first work function metal layer, and forming a second work function metal layer in the opening and over the first work function metal layer. The second work function metal layer lines and overhangs the recessed first work function metal layer.
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公开(公告)号:US11232978B2
公开(公告)日:2022-01-25
申请号:US16845415
申请日:2020-04-10
发明人: Jeng Chang Her , Cha-Hsin Chao , Yi-Wei Chiu , Li-Te Hsu , Ying Ting Hsia
IPC分类号: H01L23/52 , H01L21/768 , H01L21/02 , H01L21/3115 , H01L23/522 , H01L23/528 , H01L23/532
摘要: In a method for manufacturing a semiconductor device, a first interlayer dielectric layer is formed over a substrate. First recesses are formed in the first interlayer dielectric layer. First metal wirings are formed in the first recesses. A first etch-resistance layer is formed in a surface of the first interlayer dielectric layer between the first metal wirings but not on upper surfaces of the first metal wirings. A first insulating layer is formed on the first etch-resistance layer and the upper surfaces of the first metal wirings.
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公开(公告)号:US20210366770A1
公开(公告)日:2021-11-25
申请号:US17397621
申请日:2021-08-09
发明人: Yun-Yu Hsieh , Jeng Chang Her , Cha-Hsin Chao , Yi-Wei Chiu , Li-Te Hsu , Ying Ting Hsia
IPC分类号: H01L21/768 , H01L29/78 , H01L29/66 , H01L21/3213 , H01L29/417 , H01L21/311 , H01L23/485
摘要: A method of forming a semiconductor device includes forming a source/drain region on a substrate and forming a first interlayer dielectric (ILD) layer over the source/drain region. The method further includes forming a second ILD layer over the first ILD layer, forming a source/drain contact structure within the first ILD layer and the second ILD layer, and selectively removing a portion of the source/drain contact structure to form a concave top surface of the source/drain contact structure.
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