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    BOND PAD STRUCTURE WITH HIGH VIA DENSITY
    5.
    发明申请
    BOND PAD STRUCTURE WITH HIGH VIA DENSITY 有权

    公开(公告)号：US20220367554A1

    公开(公告)日：2022-11-17

    申请号：US17391302

    申请日：2021-08-02

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Yu-Hsien Li ,  Yen-Ting Chiang ,  Shyh-Fann Ting ,  Jen-Cheng Liu ,  Dun-Nian Yaung

    IPC分类号： H01L27/146

    摘要： Various embodiments of the present disclosure are directed towards an integrated circuit (IC) chip in which a bond pad structure extends to a columnar structure with a high via density. For example, an interconnect structure is on a frontside of a substrate and comprises a first bond wire, a second bond wire, and bond vias forming the columnar structure. The bond vias extend from the first bond wire to the second bond wire. The bond pad structure is inset into a backside of the substrate, opposite the frontside, and extends to the first bond wire. A projection of the first or second bond wire onto a plane parallel to a top surface of the substrate has a first area, and a projection of the bond vias onto the plane has a second area that is 10% or more of the first area, such that via density is high.

    Device crack-stop structure to prevent damage due to dicing crack
    8.
    发明授权
    Device crack-stop structure to prevent damage due to dicing crack 有权

    公开(公告)号：US11348881B2

    公开(公告)日：2022-05-31

    申请号：US16589460

    申请日：2019-10-01

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Tung-Ting Wu ,  Chen-Jong Wang ,  Jen-Cheng Liu ,  Yimin Huang ,  Chin-Chia Kuo

    IPC分类号： H01L23/58 ,  H01L27/146

    摘要： Various embodiments of the present disclosure are directed towards a semiconductor structure including a crack-stop structure disposed within a semiconductor substrate. The semiconductor substrate has a back-side surface and a front-side surface opposite the back-side surface. Photodetectors are disposed within the semiconductor substrate and are laterally spaced within a device region. An interconnect structure is disposed along the front-side surface. The interconnect structure includes a seal ring structure. A crack-stop structure is disposed within the semiconductor substrate and overlies the seal ring structure. The crack-stop structure continuously extends around the device region.

    Stacked semiconductor dies with a conductive feature passing through a passivation layer
    10.
    发明授权
    Stacked semiconductor dies with a conductive feature passing through a passivation layer 有权

    公开(公告)号：US11177307B2

    公开(公告)日：2021-11-16

    申请号：US17005582

    申请日：2020-08-28

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Min-Feng Kao ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Hsun-Ying Huang

    IPC分类号： H01L31/062 ,  H01L27/146 ,  H01L23/48

    摘要： A semiconductor device structure is provided. The semiconductor device structure includes a first semiconductor die, and a second semiconductor die bonded on the first semiconductor die. A through-substrate via penetrates through a semiconductor substrate of the second semiconductor die. A passivation layer is disposed between the first semiconductor die and the second semiconductor die, wherein the passivation layer is directly bonded to the semiconductor substrate of the second semiconductor die. A conductive feature passes through the passivation layer, wherein the conductive feature is bonded to the through-substrate via. A barrier layer is disposed between the conductive feature and the passivation layer. The barrier layer covers sidewalls of the conductive feature and separates the surface of the conductive feature from a nearest neighboring surface of the first or second semiconductor die.