EMBEDDED CAPACITORS WITH SHARED ELECTRODES
    1.
    发明公开

    公开(公告)号:US20230411277A1

    公开(公告)日:2023-12-21

    申请号:US17842972

    申请日:2022-06-17

    摘要: Capacitors and interconnect structures that couple transistors to one another include parallel stacked metal lines separated by dielectric layers. When capacitors and interconnect structures are combined, each top metal capacitor plate can be coupled to the nearest upper metal line by a through-via, while each bottom metal capacitor plate can be coupled directly to the nearest lower metal line without a via. When a back end of line (BEOL) cell includes multiple capacitors, and design rules require shrinking the cell dimensions, substituting an alternative design that has fewer through-vias can facilitate compaction of the BEOL cell. Similarly, placing capacitors in close proximity so that they can share through-vias can allow even further compaction.

    METAL-INSULATOR-METAL DEVICE WITH IMPROVED PERFORMANCE

    公开(公告)号:US20220310507A1

    公开(公告)日:2022-09-29

    申请号:US17352969

    申请日:2021-06-21

    IPC分类号: H01L23/522 H01L49/02

    摘要: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC comprises a first inter-metal dielectric (IMD) structure disposed over a semiconductor substrate. A metal-insulator-metal (MIM) device is disposed over the first IMD structure. The MIM device comprises at least three metal plates that are spaced from one another. The MIM device further comprises a plurality of capacitor insulator structures, where each of the plurality of capacitor insulator structures are disposed between and electrically isolate neighboring metal plates of the at least three metal plates.