- 专利标题： 3DIC Interconnect Apparatus and Method
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申请号： US18359311申请日： 2023-07-26
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公开(公告)号： US20230378139A1公开(公告)日： 2023-11-23
- 发明人: Shu-Ting Tsai , Dun-Nian Yaung , Jen-Cheng Liu , Chun-Chieh Chuang , Chia-Chieh Lin , U-Ting Chen
- 申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址： TW Hsinchu
- 专利权人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址： TW Hsinchu
- 分案原申请号： US14135153 2013.12.19
- 主分类号： H01L25/065
- IPC分类号： H01L25/065 ; H01L25/00 ; H01L23/48 ; H01L23/00 ; H01L21/768 ; H01L23/532
摘要：
An interconnect apparatus and a method of forming the interconnect apparatus is provided. Two integrated circuits are bonded together. A first opening is formed through one of the substrates. A multi-layer dielectric film is formed along sidewalls and a bottom of the first opening. A second opening is formed extending from the first opening to pads in the integrated circuits. A dielectric liner is formed, and the opening is filled with a conductive material to form a conductive plug.
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