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14 条记录 (耗时 0.015 秒)

    MEMORY DEVICE
    1.
    发明申请
    MEMORY DEVICE 审中-公开

    公开(公告)号：US20180277759A1

    公开(公告)日：2018-09-27

    申请号：US15709753

    申请日：2017-09-20

    申请人： Toshiba Memory Corporation

    发明人： Takashi TACHIKAWA ,  Masumi SAITOH

    IPC分类号： H01L45/00 ,  H01L27/24

    CPC分类号： H01L45/147 ,  H01L27/2436 ,  H01L27/249 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146

    摘要： A memory device according to an embodiment includes a first conductive layer; a second conductive layer; a first metal oxide layer that is provided between the first conductive layer and the second conductive layer and includes at least one first metal element selected from the group consisting of aluminum (Al), gallium (Ga), zirconium (Zr), and hafnium (Hf); and a second metal oxide layer that is provided between the first metal oxide layer and the second conductive layer and includes at least one second metal element selected from the group consisting of zinc (Zn), titanium (Ti), tin (Sn), vanadium (V), niobium (Nb), tantalum (Ta), and tungsten (W). The first metal oxide layer includes a third metal element. The third metal element has a lower valence than a metal element having the highest atomic percent in the first metal oxide layer among the at least one first metal element.

    SEMICONDUCTOR MEMORY DEVICE
    2.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20180269257A1

    公开(公告)日：2018-09-20

    申请号：US15699254

    申请日：2017-09-08

    申请人： TOSHIBA MEMORY CORPORATION

    发明人： Chika TANAKA ,  Masumi SAITOH

    IPC分类号： H01L27/24 ,  G11C13/00 ,  H01L45/00

    CPC分类号： H01L27/2481 ,  G11C13/0023 ,  G11C13/0038 ,  H01L45/1253

    摘要： This semiconductor memory device includes: global first wiring lines; global second wiring lines; and memory blocks connected to the Global first wiring lines and the global second wiring lines. The memory block includes: local first wiring lines; local second wiring lines; and memory cells connected to the local first wiring lines and the local second wiring lines. The memory cell includes: a variable resistance element; first electrodes disposed on a first surface of the variable resistance element; and second electrodes arranged on a second surface of the variable resistance element. The first electrodes are connected to the local first wiring lines, and the second electrodes are connected to the local second wiring lines.

    MEMORY DEVICE
    4.
    发明申请
    MEMORY DEVICE 审中-公开

    公开(公告)号：US20200303643A1

    公开(公告)日：2020-09-24

    申请号：US16562352

    申请日：2019-09-05

    申请人： Toshiba Memory Corporation

    发明人： Marina YAMAGUCHI ,  Masumi SAITOH ,  Kiwamu SAKUMA

    IPC分类号： H01L45/00 ,  H01L27/24 ,  G11C13/00

    摘要： A memory device of an embodiment includes: a first conductive layer; a second conductive layer; a first region provided between the first conductive layer and the second conductive layer, being in contact with the first conductive layer and the second conductive layer, and including a first metal oxide, the first metal oxide corresponding to at least one selected from a group consisting of tantalum oxide, lanthanum oxide, and hafnium oxide; and a first layer provided between the first conductive layer and the second conductive layer and including a second metal oxide different from the first metal oxide.

    MEMORY DEVICE
    5.
    发明申请
    MEMORY DEVICE 审中-公开

    公开(公告)号：US20200083292A1

    公开(公告)日：2020-03-12

    申请号：US16352534

    申请日：2019-03-13

    申请人： Toshiba Memory Corporation

    发明人： Marina YAMAGUCHI ,  Shoichi KABUYANAGI ,  Masumi SAITOH

    IPC分类号： H01L27/24 ,  H01L45/00 ,  H01L23/528 ,  G11C13/00

    摘要： According to one embodiment, a memory device includes a first conductive layer, a second conductive layer, and a first layer. A direction from the first conductive layer toward the second conductive layer is aligned with a first direction. The first layer is provided between the first conductive layer and the second conductive layer. The first layer includes a first region including titanium and oxygen, a second region including aluminum and oxygen and being provided between the first conductive layer and the first region, and a third region including aluminum and oxygen and being provided between the first region and the second conductive layer. A surface area in a first plane of a brookite region included in the first region is 58 percent or more of a surface area in the first plane of the first region. The first plane crosses the first direction.

    NONVOLATILE SEMICONDUCTOR MEMORY
    6.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY 审中-公开

    公开(公告)号：US20190287617A1

    公开(公告)日：2019-09-19

    申请号：US16120031

    申请日：2018-08-31

    申请人： TOSHIBA MEMORY CORPORATION

    发明人： Chika TANAKA ,  Masumi SAITOH

    IPC分类号： G11C14/00 ,  H01L27/11502

    摘要： A semiconductor memory includes a first and a second transistor each with one of source/drain connected to a first wiring. The other of the source/drain for each of first and second transistor is connected to the gate of the other transistor. A third and a fourth transistor each have gates connected to a second wiring, one of source/drain of each connected to a third or fifth wiring, the other of the source/drain connected to the other of the source/drain of the first or second transistor. For the third transistor, a gate insulation layer includes a first ferroelectric material. For the fourth transistor, and a gate insulation layer includes a second ferroelectric material.

    MEMORY DEVICE
    8.
    发明申请
    MEMORY DEVICE 审中-公开

    公开(公告)号：US20190198760A1

    公开(公告)日：2019-06-27

    申请号：US16287753

    申请日：2019-02-27

    申请人： Toshiba Memory Corporation

    发明人： Takashi TACHIKAWA ,  Masumi SAITOH

    IPC分类号： H01L45/00 ,  H01L27/24

    CPC分类号： H01L45/147 ,  H01L27/2436 ,  H01L27/249 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146

    摘要： A memory device according to an embodiment includes a first conductive layer; a second conductive layer; a first metal oxide layer that is provided between the first conductive layer and the second conductive layer and includes at least one first metal element selected from the group consisting of aluminum (Al), gallium (Ga), zirconium (Zr), and hafnium (Hf); and a second metal oxide layer that is provided between the first metal oxide layer and the second conductive layer and includes at least one second metal element selected from the group consisting of zinc (Zn), titanium (Ti), tin (Sn), vanadium (V), niobium (Nb), tantalum (Ta), and tungsten (W). The first metal oxide layer includes a third metal element. The third metal element has a lower valence than a metal element having the highest atomic percent in the first metal oxide layer among the at least one first metal element.

    SEMICONDUCTOR MEMORY DEVICE
    9.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20190096683A1

    公开(公告)日：2019-03-28

    申请号：US15916690

    申请日：2018-03-09

    申请人： TOSHIBA MEMORY CORPORATION

    发明人： Kiwamu SAKUMA ,  Masumi SAITOH

    IPC分类号： H01L21/28 ,  H01L27/11521 ,  H01L27/11546 ,  H01L27/12 ,  H01L29/66 ,  H01L21/02

    CPC分类号： H01L29/40114 ,  H01L21/0262 ,  H01L27/11521 ,  H01L27/11546 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582 ,  H01L27/1211 ,  H01L27/1281 ,  H01L29/66757

    摘要： A semiconductor memory device including a first semiconductor layer, first gate electrodes, a first gate insulating layer and a laminated film. The first semiconductor layer extends in a first direction intersecting a substrate. The first gate electrodes are arranged in the first direction and face the first semiconductor layer in a second direction intersecting the first direction. End portions of the first gate electrodes in the second direction have different positions from each other and form a stepped contact portion. The laminated film covers at least parts of upper surfaces and at least parts of side surfaces intersecting the second direction, of the first gate electrodes. The laminated film includes a first insulating layer, second semiconductor layers, a second gate insulating layer, and a second gate electrode. Positions in the first direction and positions in the second direction of the second semiconductor layers are different from each other.

    SEMICONDUCTOR MEMORY DEVICE
    10.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20200303461A1

    公开(公告)日：2020-09-24

    申请号：US16564667

    申请日：2019-09-09

    申请人： TOSHIBA MEMORY CORPORATION

    发明人： Shoichi KABUYANAGI ,  Shosuke FUJII ,  Masumi SAITOH

    IPC分类号： H01L27/24 ,  G11C13/00

    摘要： A semiconductor memory device includes a first wiring extending in a first direction, a second wiring extending in a second direction, a variable resistance film provided between these, a third wiring extending in a third direction, a first semiconductor section connected to the first wiring and the third wiring, a first gate electrode facing the first semiconductor section, a contact connected to the second wiring, a fourth wiring further from the substrate than the contact is, a second semiconductor section connected to the contact and the fourth wiring, and a second gate electrode facing the second semiconductor section. The first semiconductor section, the first gate electrode, the second semiconductor section, and the second gate electrode respectively include a portion included in a cross section extending in the second direction and the third direction.