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    Dummy pattern design for thermal annealing
    6.
    发明授权
    Dummy pattern design for thermal annealing 有权
    用于热退火的假模式设计

    公开(公告)号：US08772056B2

    公开(公告)日：2014-07-08

    申请号：US14134344

    申请日：2013-12-19

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Li-Ting Wang ,  Jiunn-Ren Hwang

    IPC分类号： H01L21/00

    CPC分类号： H01L21/324 ,  H01L27/0207 ,  H01L27/11

    摘要： The present disclosure provides a semiconductor structure including a semiconductor substrate having a device region and a dummy region adjacent the device region; a plurality of active regions in the device region; and a plurality of dummy active regions in the dummy region, where each of the active regions has a first dimension in a first direction and a second dimension in a second direction perpendicular to the first direction, and the first dimension is substantially greater than the second dimension; and each of the dummy active regions has a third dimension in the first direction and a fourth dimension in the second direction, and the third dimension is substantially greater than the fourth dimension. The plurality of dummy active regions are configured such that thermal annealing effect in the dummy region is substantially equal to that of the device region.

    摘要翻译： 本公开提供了一种半导体结构，其包括具有器件区域和邻近器件区域的虚设区域的半导体衬底; 所述器件区域中的多个有源区; 以及所述虚拟区域中的多个虚拟有源区域，其中所述有源区域中的每一个具有在第一方向上的第一尺寸和与所述第一方向垂直的第二方向上的第二尺寸，并且所述第一尺寸基本上大于所述第二尺寸 尺寸; 并且所述虚拟有源区域中的每一个具有在所述第一方向上的第三尺寸和在所述第二方向上的第四尺寸，并且所述第三尺寸基本上大于所述第四尺寸。 多个虚拟有源区域被配置为使得虚拟区域中的热退火效应基本上等于器件区域的热退火效果。

    Source/Drain Structure
    7.
    发明申请
    Source/Drain Structure 有权

    公开(公告)号：US20220173239A1

    公开(公告)日：2022-06-02

    申请号：US17651437

    申请日：2022-02-17

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Su-Hao Liu ,  Kuo-Ju Chen ,  Wen-Yen Chen ,  Ying-Lang Wang ,  Liang-Yin Chen ,  Li-Ting Wang ,  Huicheng Chang

    IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L21/768 ,  H01L21/8238 ,  H01L21/324

    摘要： Embodiments disclosed herein relate to using an implantation process and a melting anneal process performed on a nanosecond scale to achieve a high surface concentration (surface pile up) dopant profile and a retrograde dopant profile simultaneously. In an embodiment, a method includes forming a source/drain structure in an active area on a substrate, the source/drain structure including a first region comprising germanium, implanting a first dopant into the first region of the source/drain structure to form an amorphous region in at least the first region of the source/drain structure, implanting a second dopant into the amorphous region containing the first dopant, and heating the source/drain structure to liquidize and convert at least the amorphous region into a crystalline region, the crystalline region containing the first dopant and the second dopant.

    Source/Drain Structure
    8.
    发明申请
    Source/Drain Structure 审中-公开

    公开(公告)号：US20200279944A1

    公开(公告)日：2020-09-03

    申请号：US16876436

    申请日：2020-05-18

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Su-Hao Liu ,  Kuo-Ju Chen ,  Wen-Yen Chen ,  Ying-Lang Wang ,  Liang-Yin Chen ,  Li-Ting Wang ,  Huicheng Chang

    IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L21/768 ,  H01L21/8238 ,  H01L21/324

    摘要： Embodiments disclosed herein relate to using an implantation process and a melting anneal process performed on a nanosecond scale to achieve a high surface concentration (surface pile up) dopant profile and a retrograde dopant profile simultaneously. In an embodiment, a method includes forming a source/drain structure in an active area on a substrate, the source/drain structure including a first region comprising germanium, implanting a first dopant into the first region of the source/drain structure to form an amorphous region in at least the first region of the source/drain structure, implanting a second dopant into the amorphous region containing the first dopant, and heating the source/drain structure to liquidize and convert at least the amorphous region into a crystalline region, the crystalline region containing the first dopant and the second dopant.

    Source/Drain Structure
    9.
    发明申请
    Source/Drain Structure 审中-公开

    公开(公告)号：US20200006545A1

    公开(公告)日：2020-01-02

    申请号：US16020443

    申请日：2018-06-27

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Su-Hao Liu ,  Kuo-Ju Chen ,  Wen-Yen Chen ,  Ying-Lang Wang ,  Liang-Yin Chen ,  Li-Ting Wang ,  Huicheng Chang

    IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L21/324 ,  H01L21/8238 ,  H01L21/768

    摘要： Embodiments disclosed herein relate to using an implantation process and a melting anneal process performed on a nanosecond scale to achieve a high surface concentration (surface pile up) dopant profile and a retrograde dopant profile simultaneously. In an embodiment, a method includes forming a source/drain structure in an active area on a substrate, the source/drain structure including a first region comprising germanium, implanting a first dopant into the first region of the source/drain structure to form an amorphous region in at least the first region of the source/drain structure, implanting a second dopant into the amorphous region containing the first dopant, and heating the source/drain structure to liquidize and convert at least the amorphous region into a crystalline region, the crystalline region containing the first dopant and the second dopant.