公开(公告)号：US11255658B2

公开(公告)日：2022-02-22

申请号：US17002677

申请日：2020-08-25

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Feng Yuan Hsu ,  Chi-Ming Yang ,  Ching-Hsiang Hsu ,  Chyi Shyuan Chern

IPC: G01B11/06 ,  H01L21/66 ,  G01N21/21

Abstract: An ellipsometer includes a light source, a polarizer, an asymmetric wavelength retarder, an analyzer and an optical detection component. The light source is configured to provide a light beam having multiple wavelengths incident to a sample. The polarizer is disposed between the light source and the sample, and configured to polarize the light beam. The asymmetric wavelength retarder is configured to provide a varied retardation effect on the light beam varied by wavelength. The analyzer is configured to analyze a polarization state of the light beam reflected by the sample. The optical detection component is configured to detect the light beam from the analyzer.

公开(公告)号：US10509311B1

公开(公告)日：2019-12-17

申请号：US15992017

申请日：2018-05-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Chung-Chieh Lee ,  Feng Yuan Hsu ,  Chyi Shyuan Chern ,  Chi-Ming Yang ,  Tsiao-Chen Wu ,  Chun-Lin Chang

IPC: G03F1/24 ,  G03F1/52 ,  G03F7/20

Abstract: A method for generating an electromagnetic radiation includes the following operations. A target material is introduced in a chamber. A light beam is irradiated on the target material in the chamber to generate plasma and an electromagnetic radiation. The electromagnetic radiation is collected with an optical device. A gas mixture is introduced in the chamber. The gas mixture includes a first buffer gas reactive to the target material, and a second buffer gas to slow down debris of the target material and/or plasma by-product, so as to increase an reaction efficiency of the target material and the first buffer gas, and to reduce deposition of the debris of the target material and/or the plasma by-product on the optical device.

公开(公告)号：US20170205705A1

公开(公告)日：2017-07-20

申请号：US14996966

申请日：2016-01-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Jeng-Shin Ma ,  Tsiao-Chen Wu ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chih-Cheng Lin ,  Yun-Yue Lin

IPC: G03F1/64

CPC classification number: G03F1/64 ,  G03F1/62

Abstract: A method for manufacturing a pellicle includes: providing a supporting substrate; forming an oxide layer over the supporting substrate; forming a metal layer over the oxide layer; forming a graphene layer over the metal layer; and removing at least a portion of the supporting substrate and the oxide layer. An associated method includes: providing a supporting substrate; forming a first silicon carbide (SiC) layer or a diamond layer over the supporting substrate; forming a graphene layer over the SiC layer or the diamond layer; and removing at least a portion of the supporting substrate and the first silicon carbide (SiC) layer or the diamond layer; wherein the pellicle is at least partially transparent to extreme ultraviolet (EUV) radiation. An associated pellicle is also disclosed.

公开(公告)号：US08932921B2

公开(公告)日：2015-01-13

申请号：US14174689

申请日：2014-02-06

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Su-Horng Lin ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

IPC: H01L21/8238 ,  H01L21/28 ,  H01L27/092 ,  H01L29/49

CPC classification number: H01L21/823857 ,  H01L21/28079 ,  H01L21/823842 ,  H01L27/0922 ,  H01L29/4958

Abstract: The present disclosure provides an integrated circuit. The integrated circuit includes a semiconductor substrate having a first region and a second region; a first gate stack of an n-type field-effect transistor (FET) in the first region; and a second gate stack of a p-type FET in the second region. The first gate stack includes a high k dielectric layer on the semiconductor substrate, a first crystalline metal layer in a first orientation on the high k dielectric layer, and a conductive material layer on the first crystalline metal layer. The second gate stack includes the high k dielectric layer on the semiconductor substrate, a second crystalline metal layer in a second orientation on the high k dielectric layer, and the conductive material layer on the second crystalline metal layer.

Abstract translation: 本发明提供集成电路。 集成电路包括具有第一区域和第二区域的半导体衬底; 在所述第一区域中的n型场效应晶体管（FET）的第一栅极堆叠; 以及第二区域中的p型FET的第二栅极堆叠。 第一栅极堆叠包括在半导体衬底上的高k电介质层，在高k电介质层上具有第一取向的第一晶体金属层和第一晶体金属层上的导电材料层。 第二栅极堆叠包括半导体衬底上的高k电介质层，在高k电介质层上具有第二取向的第二晶体金属层和第二晶体金属层上的导电材料层。

公开(公告)号：US20140154848A1

公开(公告)日：2014-06-05

申请号：US14174689

申请日：2014-02-06

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Su-Horng Lin ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

IPC: H01L21/8238

CPC classification number: H01L21/823857 ,  H01L21/28079 ,  H01L21/823842 ,  H01L27/0922 ,  H01L29/4958

Abstract: The present disclosure provides an integrated circuit. The integrated circuit includes a semiconductor substrate having a first region and a second region; a first gate stack of an n-type field-effect transistor (FET) in the first region; and a second gate stack of a p-type FET in the second region. The first gate stack includes a high k dielectric layer on the semiconductor substrate, a first crystalline metal layer in a first orientation on the high k dielectric layer, and a conductive material layer on the first crystalline metal layer. The second gate stack includes the high k dielectric layer on the semiconductor substrate, a second crystalline metal layer in a second orientation on the high k dielectric layer, and the conductive material layer on the second crystalline metal layer.

Abstract translation: 本发明提供集成电路。 集成电路包括具有第一区域和第二区域的半导体衬底; 在所述第一区域中的n型场效应晶体管（FET）的第一栅极堆叠; 以及第二区域中的p型FET的第二栅极堆叠。 第一栅极堆叠包括在半导体衬底上的高k电介质层，在高k电介质层上具有第一取向的第一晶体金属层和第一晶体金属层上的导电材料层。 第二栅极堆叠包括半导体衬底上的高k电介质层，在高k电介质层上具有第二取向的第二晶体金属层和第二晶体金属层上的导电材料层。

公开(公告)号：US11153957B2

公开(公告)日：2021-10-19

申请号：US16505156

申请日：2019-07-08

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Tzu Jeng Hsu ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Jui-Chun Peng ,  Heng-Hsin Liu ,  Chin-Hsiang Lin

IPC: H05G2/00

Abstract: An electromagnetic radiation generation apparatus includes a collector, a gas supplier and a gas pipeline. The collector has a reflection surface configured to reflect an electromagnetic radiation. The collector includes a bottom portion, a perimeter portion, and a middle portion between the bottom portion and the perimeter portion. The middle portion of the collector includes a plurality of openings. The gas supplier is configured to provide a buffer gas. The gas pipeline is in communication with the gas supplier and the collector, and configured to purge the buffer gas through the openings of the middle portion to form a gas protection layer near the reflection surface of the collector. The openings of the middle portion include a plurality of holes arranged in an array including a plurality of rows of holes, or a plurality of concentric gaps.

公开(公告)号：US11004746B2

公开(公告)日：2021-05-11

申请号：US16678606

申请日：2019-11-08

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Chung-Chieh Lee ,  Chi-Ming Yang ,  Chyi Shyuan Chern

IPC: H01L21/66 ,  H01L21/8234 ,  H01L29/66

Abstract: The present disclosure provides a dehydrating chemical for dehydrating a semiconductor substrate under an ambient temperature, including a first chemical having a melting point below the ambient temperature, and a second chemical having a melting point greater than the melting point of the first chemical, wherein the dehydrating chemical has a melting point less than the ambient temperature by predetermined ΔT0 degrees, and at least one of the first chemical and the second chemical has a saturated vapor pressure greater than a predetermined pressure PSV under 1 atm.

公开(公告)号：US09864270B2

公开(公告)日：2018-01-09

申请号：US14996966

申请日：2016-01-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Jeng-Shin Ma ,  Tsiao-Chen Wu ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chih-Cheng Lin ,  Yun-Yue Lin

IPC: G03F1/62 ,  G03F1/64

CPC classification number: G03F1/64 ,  G03F1/62

Abstract: A method for manufacturing a pellicle includes: providing a supporting substrate; forming an oxide layer over the supporting substrate; forming a metal layer over the oxide layer; forming a graphene layer over the metal layer; and removing at least a portion of the supporting substrate and the oxide layer. An associated method includes: providing a supporting substrate; forming a first silicon carbide (SiC) layer or a diamond layer over the supporting substrate; forming a graphene layer over the SiC layer or the diamond layer; and removing at least a portion of the supporting substrate and the first silicon carbide (SiC) layer or the diamond layer; wherein the pellicle is at least partially transparent to extreme ultraviolet (EUV) radiation. An associated pellicle is also disclosed.

公开(公告)号：US09214543B2

公开(公告)日：2015-12-15

申请号：US13915184

申请日：2013-06-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Simon Su-Horng Lin ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

IPC: H01L29/78 ,  H01L29/49 ,  C23C14/02 ,  C23C14/04 ,  C23C14/18 ,  C23C14/22 ,  C23C16/02 ,  C23C16/04 ,  C23C16/06 ,  C23C16/48 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768 ,  H01L29/66

CPC classification number: H01L29/78 ,  C23C14/022 ,  C23C14/046 ,  C23C14/18 ,  C23C14/221 ,  C23C16/0263 ,  C23C16/045 ,  C23C16/06 ,  C23C16/48 ,  C23C16/484 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76865 ,  H01L21/76877 ,  H01L29/4966 ,  H01L29/66545

Abstract: A gate structure including a substrate and a gate dielectric layer formed over the substrate. The gate structure further includes a workfunction layer over the gate dielectric layer and spacers enclosing the gate dielectric layer and the workfunction layer. A top surface of a portion of the workfunction layer in contact with sidewalls of the spacer is a same distance from the gate dielectric layer as a top surface of a center portion of the work function layer.

Abstract translation: 一种栅极结构，包括在基板上形成的基板和栅极电介质层。 栅极结构还包括在栅极电介质层上的功函数层和包围栅极介电层和功函数层的间隔物。 与间隔物的侧壁接触的功函数层的一部分的顶表面与作为功函数层的中心部分的顶表面的栅介电层相同。

公开(公告)号：US11517995B2

公开(公告)日：2022-12-06

申请号：US16448963

申请日：2019-06-21

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Ji James Cui ,  Chia-Hsun Chang ,  Chih Hung Chen ,  Liang-Guang Chen ,  Tzu Kai Lin ,  Chyi Shyuan Chern ,  Keith Kuang-Kuo Koai

IPC: B24B49/00 ,  B24B37/015 ,  B24B57/02 ,  B24B37/34

Abstract: The present disclosure provides a wet chemical heating system, including a first conduit for transporting wet chemical, a dispensing head connected to the first conduit, and a radiative heating element configured to heat the wet chemical in the first conduit and positioned at an upper stream of the dispensing head.