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公开(公告)号：US20220254433A1
公开(公告)日：2022-08-11
申请号：US17469422
申请日：2021-09-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sehwan PARK , Jinyoung KIM , Youngdeok SEO , Dongmin SHIN , Joonsuc JANG , Sungmin JOE
Abstract: A storage device includes a nonvolatile memory device and a memory controller to control the nonvolatile memory device. The nonvolatile memory device includes a memory cell array. The memory cell array includes a normal cell region, a parity cell region and a redundancy cell region. First bit-lines are connected to the normal cell region and the parity cell region and second bit-lines are connected to the redundancy cell region. The memory controller includes an error correction code (ECC) engine to generate parity data. The memory controller stores user data in the normal cell region, controls the nonvolatile memory device to perform a column repair on first defective bit-lines among the first bit-lines, assigns additional column addresses to the first defective bit-lines and the second bit-lines and stores at least a portion of the parity data in a region corresponding to the additionally assigned column addresses.
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2.发明申请公开(公告)号：US20220139475A1
公开(公告)日：2022-05-05
申请号：US17328487
申请日：2021-05-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Youngdeok SEO , Jinyoung Kim , Sehwan Park , Dongmin Shin
Abstract: A non-volatile memory device includes a memory cell array including memory cells, a page buffer circuit including page buffers respectively connected to bit lines, a buffer memory, and a control logic configured to control a read operation on the memory cells. In the read operation, the control logic obtains valley search detection information including read target block information and word line information by performing a valley search sensing operation on a distribution of threshold voltages of the memory cells, obtains a plurality of read levels using a read information model by inputting the valley search detection information into the read information model, and performs a main sensing operation for the read operation.
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公开(公告)号：US20230086157A1
公开(公告)日：2023-03-23
申请号：US17722780
申请日：2022-04-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Woohyun KANG , Youngdeok SEO , Hyuna KIM , Hyunkyo OH , Donghoo LIM
IPC: G06F3/06
Abstract: Disclosed is a method of operating a storage controller which communicates with a non-volatile memory device. The method includes outputting a first command including a request for on-chip valley search (OVS) count data of a memory region of the non-volatile memory device to the non-volatile memory device, wherein the OVS count data includes a first count value and a second count value of a first read voltage and a third count value and a fourth count value of a second read voltage, receiving the OVS count data from the non-volatile memory device, determining a distribution type of the memory region to be a predicted distribution type, from among a plurality of distribution types, based on the OVS count data, and determining a subsequent operation, based on the predicted distribution type.
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公开(公告)号：US20220276802A1
公开(公告)日：2022-09-01
申请号：US17522578
申请日：2021-11-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Youngdeok SEO , Jinyoung KIM , Sehwan PARK , Ilhan PARK
IPC: G06F3/06
Abstract: A nonvolatile memory device includes a memory block including a memory area, an on-chip valley search (OVS) circuit performing an OVS sensing operation on the memory block, and a buffer memory storing at least one variation table including variation information of a threshold voltage of memory cells, obtained from the OVS sensing operation. A reading operation including an OVS sensing operation and a main sensing operation on the memory area is performed in response to a read command applied by a memory controller, the OVS sensing operation is performed at an OVS sensing level, and the main sensing operation is performed at a main sensing level reflecting the variation information. In the nonvolatile memory device, correction accuracy for deterioration of a word line threshold voltage may be improved, and a burden on a memory controller may be reduced.
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公开(公告)号：US20220199164A1
公开(公告)日：2022-06-23
申请号：US17503197
申请日：2021-10-15
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jinyoung KIM , Sehwan PARK , Ilhan PARK , Youngdeok SEO , Dongmin SHIN
Abstract: A memory device may include a memory block and a control circuit. The memory block may include a first sub-block and a second sub-block that are connected between a common source line and a plurality of bit lines and may be vertically stacked. The control circuit may be configured to select any one of the common source line and the plurality of bit lines as a transmission path of an erase voltage based on positions of the first sub-block and the second sub-block, and perform erase operations on the first sub-block and the second sub-block in units of sub-blocks.
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Patent Agency Ranking
公开(公告)号：US20240038309A1
公开(公告)日：2024-02-01
申请号：US18378540
申请日：2023-10-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jinyoung KIM , Sehwan PARK , Ilhan PARK , Youngdeok SEO , Dongmin SHIN
CPC classification number: G11C16/16 , G11C16/08 , G11C16/0433 , G11C16/26 , G11C16/24
Abstract: A memory device may include a memory block and a control circuit. The memory block may include a first sub-block and a second sub-block that are connected between a common source line and a plurality of bit lines and may be vertically stacked. The control circuit may be configured to select any one of the common source line and the plurality of bit lines as a transmission path of an erase voltage based on positions of the first sub-block and the second sub-block, and perform erase operations on the first sub-block and the second sub-block in units of sub-blocks.
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7.发明公开公开(公告)号：US20230187002A1
公开(公告)日：2023-06-15
申请号：US17893476
申请日：2022-08-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyuna KIM , Woohyun KANG , Youngdeok SEO , Hyunkyo OH , Donghoo LIM
CPC classification number: G11C16/3495 , G11C16/3404 , G11C16/26
Abstract: Disclosed is a storage controller which includes a history table and communicates with a non-volatile memory device. A method of operating the storage controller includes determining whether history data of a target memory block are registered at the history table, providing a history read request for the target memory block based on the history data when it is determined that the history data are registered, receiving first raw data corresponding to the history read request from the non-volatile memory device, generating skew information of the target memory block based on the first raw data and the history data, and determining whether to perform a read reclaim operation of the target memory block, based on the skew information.
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公开(公告)号：US20230124303A1
公开(公告)日：2023-04-20
申请号：US18068337
申请日：2022-12-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sehwan PARK , Jinyoung KIM , Youngdeok SEO , Dongmin SHIN , Joonsuc JANG , Sungmin JOE
Abstract: A storage device includes a nonvolatile memory device and a memory controller to control the nonvolatile memory device. The nonvolatile memory device includes a memory cell array. The memory cell array includes a normal cell region, a parity cell region and a redundancy cell region. First bit-lines are connected to the normal cell region and the parity cell region and second bit-lines are connected to the redundancy cell region. The memory controller includes an error correction code (ECC) engine to generate parity data. The memory controller stores user data in the normal cell region, controls the nonvolatile memory device to perform a column repair on first defective bit-lines among the first bit-lines, assigns additional column addresses to the first defective bit-lines and the second bit-lines and stores at least a portion of the parity data in a region corresponding to the additionally assigned column addresses.
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公开(公告)号：US20240176700A1
公开(公告)日：2024-05-30
申请号：US18512613
申请日：2023-11-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Youngjoo SEO , Youngdeok SEO , Sangkwon MOON , Hyunkyo OH , Hee-Tai OH , Heewon LEE , Jisoo KIM
CPC classification number: G06F11/1068 , G06F11/076
Abstract: An operation method of a storage controller, which is configured to control a nonvolatile memory device, includes initiating a first instance of a respective reliability operation for a respective memory block included in the nonvolatile memory device, the respective reliability operation including detecting a degradation level of the respective memory block and setting a respective skip reference value based on the detected degradation level; determining whether a respective number of consecutively skipped instances of the respective reliability operation is less than the respective skip reference value; and selectively skipping or performing a next instance of the respective reliability operation based on the determination result.
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10.发明申请公开(公告)号：US20220230695A1
公开(公告)日：2022-07-21
申请号：US17498832
申请日：2021-10-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sehwan PARK , Jinyoung KIM , Youngdeok SEO , Dongmin SHIN
Abstract: A nonvolatile memory device includes; a memory cell array including a meta data region storing chip-level information, control logic identifying a target cell in response to a command, machine learning (ML) logic inferring an optimum parameter based on the chip-level information and physical information associated with the target cell applied as inputs to an artificial neural network model, and a buffer memory configured to store weight parameters of the artificial neural network model.
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