公开(公告)号：US20210280469A1

公开(公告)日：2021-09-09

申请号：US17328348

申请日：2021-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Hyun LEE ,  Jeong Yun LEE ,  Seung Ju PARK ,  Geum Jung SEONG ,  Young Mook OH ,  Seung Soo HONG

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/417 ,  H01L21/8238 ,  H01L29/08 ,  H01L29/78 ,  H01L29/423

Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction. The semiconductor device includes a first gate structure on a substrate, the first gate structure extending lengthwise in a first direction to have two long sides and two short sides, relative to each other, and including a first gate spacer; a second gate structure on the substrate, the second gate structure extending lengthwise in the first direction to have two long sides and two short sides, relative to each other, and including a second gate spacer, wherein a first short side of the second gate structure faces a first short side of the first gate structure; and a gate insulating support disposed between the first short side of the first gate structure and the first short side of the second gate structure and extending lengthwise in a second direction different from the first direction, a length of the gate insulating support in the second direction being greater than a width of each of the first gate structure and the second gate structure in the second direction.

公开(公告)号：US20220231015A1

公开(公告)日：2022-07-21

申请号：US17509265

申请日：2021-10-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bok Young LEE ,  Young Mook OH ,  Hyung Goo LEE ,  Hae Geon JUNG ,  Seung Mo HA

IPC: H01L27/088 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/762

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first base fin protruding from the substrate and extending in a first direction, and a first fin type pattern protruding from the first base fin and extending in the first direction. The first base fin includes a first sidewall and a second sidewall, the first and second sidewalls extending in the first direction, the first sidewall opposite to the second sidewall, the first sidewall of the first base fin at least partially defines a first deep trench, the second sidewall of the first base fin at least partially defines a second deep trench, and a depth of the first deep trench is greater than a depth of the second deep trench.

公开(公告)号：US20230238283A1

公开(公告)日：2023-07-27

申请号：US18118505

申请日：2023-03-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Hyun LEE ,  Jeong Yun LEE ,  Seung Ju PARK ,  Geum Jung SEONG ,  Young Mook OH ,  Seung Soo HONG

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/423 ,  H01L29/78 ,  H01L29/417 ,  H01L21/8238 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L21/823462 ,  H01L21/823437 ,  H01L21/823481 ,  H01L21/823821 ,  H01L27/088 ,  H01L29/785 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/42364 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823475 ,  H01L27/0886 ,  H01L29/6656

Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction. The semiconductor device includes a first gate structure on a substrate, the first gate structure extending lengthwise in a first direction to have two long sides and two short sides, relative to each other, and including a first gate spacer; a second gate structure on the substrate, the second gate structure extending lengthwise in the first direction to have two long sides and two short sides, relative to each other, and including a second gate spacer, wherein a first short side of the second gate structure faces a first short side of the first gate structure; and a gate insulating support disposed between the first short side of the first gate structure and the first short side of the second gate structure and extending lengthwise in a second direction different from the first direction, a length of the gate insulating support in the second direction being greater than a width of each of the first gate structure and the second gate structure in the second direction.

公开(公告)号：US20190326180A1

公开(公告)日：2019-10-24

申请号：US16460127

申请日：2019-07-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Hyun LEE ,  Jeong Yun LEE ,  Seung Ju PARK ,  Geum Jung SEONG ,  Young Mook OH ,  Seung Soo HONG

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/78 ,  H01L29/08 ,  H01L29/423

Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction. The semiconductor device includes a first gate structure on a substrate, the first gate structure extending lengthwise in a first direction to have two long sides and two short sides, relative to each other, and including a first gate spacer; a second gate structure on the substrate, the second gate structure extending lengthwise in the first direction to have two long sides and two short sides, relative to each other, and including a second gate spacer, wherein a first short side of the second gate structure faces a first short side of the first gate structure; and a gate insulating support disposed between the first short side of the first gate structure and the first short side of the second gate structure and extending lengthwise in a second direction different from the first direction, a length of the gate insulating support in the second direction being greater than a width of each of the first gate structure and the second gate structure in the second direction.

公开(公告)号：US20180158836A1

公开(公告)日：2018-06-07

申请号：US15869599

申请日：2018-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bo Soon KIM ,  Hyun Ji KIM ,  Jeong Yun LEE ,  Gi Gwan PARK ,  Sang Duk PARK ,  Young Mook OH ,  Yong Seok LEE

IPC: H01L27/12 ,  H01L29/06 ,  H01L29/423 ,  H01L21/84

CPC classification number: H01L27/1203 ,  H01L21/823456 ,  H01L21/823462 ,  H01L21/823468 ,  H01L21/84 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/0653 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/4991 ,  H01L29/517 ,  H01L29/66439 ,  H01L29/7853

Abstract: There is provided a semiconductor device capable of enhancing device performance by variably adjusting threshold voltage of a transistor having gate-all-around structure. The semiconductor device includes a substrate including a first region and a second region, a first wire pattern provided on the first region of the substrate and spaced apart from the substrate, a second wire pattern provided on the second region of the substrate and spaced apart from the substrate, a first gate insulating film surrounding a perimeter of the first wire pattern, a second gate insulating film surrounding a perimeter of the second wire pattern, a first gate electrode provided on the first gate insulating film, intersecting with the first wire pattern, and including a first metal oxide film therein, a second gate electrode provided on the second gate insulating film and intersecting with the second wire pattern, a first gate spacer on a sidewall of the first gate electrode, and a second gate spacer on a sidewall of the second gate electrode.

公开(公告)号：US20180138092A1

公开(公告)日：2018-05-17

申请号：US15718482

申请日：2017-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Hyun LEE ,  Jeong Yun LEE ,  Seung Ju PARK ,  Geum Jung SEONG ,  Young Mook OH ,  Seung Soo HONG

IPC: H01L21/8234 ,  H01L29/66 ,  H01L27/088 ,  H01L29/423

CPC classification number: H01L21/823462 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823475 ,  H01L21/823481 ,  H01L27/088 ,  H01L27/0886 ,  H01L29/0847 ,  H01L29/42364 ,  H01L29/6656 ,  H01L29/785

Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction. The semiconductor device includes a first gate structure on a substrate, the first gate structure extending lengthwise in a first direction to have two long sides and two short sides, relative to each other, and including a first gate spacer; a second gate structure on the substrate, the second gate structure extending lengthwise in the first direction to have two long sides and two short sides, relative to each other, and including a second gate spacer, wherein a first short side of the second gate structure faces a first short side of the first gate structure; and a gate insulating support disposed between the first short side of the first gate structure and the first short side of the second gate structure and extending lengthwise in a second direction different from the first direction, a length of the gate insulating support in the second direction being greater than a width of each of the first gate structure and the second gate structure in the second direction.

公开(公告)号：US20240258313A1

公开(公告)日：2024-08-01

申请号：US18633722

申请日：2024-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bok Young LEE ,  Young Mook OH ,  Hyung Goo LEE ,  Hae Geon JUNG ,  Seung Mo HA

IPC: H01L27/088 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/092

CPC classification number: H01L27/0886 ,  H01L21/76232 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/0924

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first base fin protruding from the substrate and extending in a first direction, and a first fin type pattern protruding from the first base fin and extending in the first direction. The first base fin includes a first sidewall and a second sidewall, the first and second sidewalls extending in the first direction, the first sidewall opposite to the second sidewall, the first sidewall of the first base fin at least partially defines a first deep trench, the second sidewall of the first base fin at least partially defines a second deep trench, and a depth of the first deep trench is greater than a depth of the second deep trench.

公开(公告)号：US20190074211A1

公开(公告)日：2019-03-07

申请号：US15962059

申请日：2018-04-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyung Seok MIN ,  Dong Kwon KIM ,  Cheol KIM ,  Young Mook OH ,  Jeong Yun LEE ,  Hyun Ho JUNG

IPC: H01L21/762 ,  H01L21/8234

Abstract: A semiconductor device includes a substrate having an active pattern extending in a first direction, a first gate structure and a second gate structure extending in a second direction, intersecting the first direction, to traverse the active pattern, the first gate structure and the second gate structure isolated from each other while facing each other in the second direction, a gate isolation pattern disposed between the first gate structure and the second gate structure, the gate isolation pattern having a void, and a filling insulating portion positioned lower than upper surfaces of the first gate structure and the second gate structure within the gate isolation pattern, the filling insulating portion being connected to at least an upper end of the void.

公开(公告)号：US20170200738A1

公开(公告)日：2017-07-13

申请号：US15403307

申请日：2017-01-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bo Soon KIM ,  Hyun Ji KIM ,  Jeong Yun LEE ,  Gi Gwan PARK ,  Sang Duk PARK ,  Young Mook OH ,  Yong Seok LEE

IPC: H01L27/12 ,  H01L29/423 ,  H01L21/84 ,  H01L29/06

CPC classification number: H01L27/1203 ,  H01L21/823456 ,  H01L21/823462 ,  H01L21/823468 ,  H01L21/84 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/0653 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/4991 ,  H01L29/517 ,  H01L29/66439 ,  H01L29/7853

Abstract: There is provided a semiconductor device capable of enhancing device performance by variably adjusting threshold voltage of a transistor having gate-all-around structure. The semiconductor device includes a substrate including a first region and a second region, a first wire pattern provided on the first region of the substrate and spaced apart from the substrate, a second wire pattern provided on the second region of the substrate and spaced apart from the substrate, a first gate insulating film surrounding a perimeter of the first wire pattern, a second gate insulating film surrounding a perimeter of the second wire pattern, a first gate electrode provided on the first gate insulating film, intersecting with the first wire pattern, and including a first metal oxide film therein, a second gate electrode provided on the second gate insulating film and intersecting with the second wire pattern, a first gate spacer on a sidewall of the first gate electrode, and a second gate spacer on a sidewall of the second gate electrode.

公开(公告)号：US20170194426A1

公开(公告)日：2017-07-06

申请号：US15292515

申请日：2016-10-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyung Seok MIN ,  Mi Gyeong GWON ,  Seong Jin NAM ,  Sug Hyun SUNG ,  Young Hoon SONG ,  Young Mook OH

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/762 ,  H01L29/161 ,  H01L29/16 ,  H01L29/165 ,  H01L29/78 ,  H01L29/08

CPC classification number: H01L29/0653 ,  H01J37/32192 ,  H01L21/31116 ,  H01L21/76224 ,  H01L21/76232 ,  H01L21/823431 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7848 ,  H01L29/7851 ,  H01L29/7853

Abstract: Semiconductor devices are provided. The semiconductor device includes a first fin and a second fin on a substrate and a field insulation layer between the first fin and the second fin. The field insulation layer include a first insulation layer and a second insulation layer on the first insulation layer and connected to the first insulation layer. The second insulation layer is wider than the first insulation layer. A ratio of a top width to a bottom width of each of the first fin and the second fin exceeds 0.5.