公开(公告)号：US10749030B2

公开(公告)日：2020-08-18

申请号：US16018121

申请日：2018-06-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soojin Jeong ,  Dong Il Bae ,  Geumjong Bae ,  Seungmin Song ,  Junggil Yang

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L27/092 ,  H01L29/08 ,  H01L29/786 ,  H01L29/66 ,  H01L21/8238 ,  H01L27/06

Abstract: A semiconductor device may include first and second channel patterns on a substrate, first and second source/drain patterns in contact respectively with the first and second channel patterns, and first and second gate electrodes respectively overlapping the first and second channel patterns. The first gate electrode may include a first segment between first and second semiconductor patterns of the first channel pattern. The first segment may include a first convex portion protruding toward the first source/drain pattern. The second gate electrode may include a second segment between third and fourth semiconductor patterns of the second channel pattern. The second segment may include a concave portion recessed toward a center of the second segment.

公开(公告)号：US20240030314A1

公开(公告)日：2024-01-25

申请号：US18175176

申请日：2023-02-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungmin SONG ,  Bongsoo Kim ,  Soojin Jeong

IPC: H01L29/66 ,  H01L29/40 ,  H01L21/311 ,  H01L21/3115 ,  H01L29/08 ,  H01L21/02 ,  H01L29/423

CPC classification number: H01L29/6656 ,  H01L29/401 ,  H01L21/311 ,  H01L21/31155 ,  H01L29/0847 ,  H01L21/02107 ,  H01L29/42364

Abstract: A semiconductor device includes a substrate including an active pattern, a pair of channel patterns spaced apart from each other in a first direction on the active pattern, each of the pair of channel patterns including vertically stacked semiconductor patterns, a source/drain pattern between the pair of channel patterns, a pair of gate electrodes on the channel patterns, an active contact between the pair of gate electrodes, and outer spacers on side surfaces of the pair of gate electrodes. A distance between the outer spacers spaced apart from each other with the active contact therebetween is smaller than a width of the source/drain pattern in the first direction at a first level at which an upper surface of an uppermost semiconductor pattern among the semiconductor patterns is positioned.

公开(公告)号：US11093049B2

公开(公告)日：2021-08-17

申请号：US16865941

申请日：2020-05-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sun-Young Park ,  Jeong-Won Ko ,  Joong-Hun Kwon ,  Chang-Hwan Kim ,  Sang-Deuk Nam ,  Seung-Wook Nam ,  Myoung-Soo Park ,  Kyung-Jun Lee ,  Dong-Oh Lee ,  Jun-Won Jung ,  Hui-Chul Yang ,  Hyun-Yeul Lee ,  Soojin Jeong

IPC: G06F3/044 ,  G06F3/02 ,  H03K17/98 ,  H03K17/96 ,  H01H13/66 ,  G06F3/0488

Abstract: An electronic device is provided. The electronic device includes a touchscreen, at least one processor electrically connected with the touchscreen, and a memory electrically connected with the processor. The memory may store instructions executed to enable the at least one processor to display a first window for running a first application and a second window for running a second application on the touchscreen, display a virtual keypad on a portion of the first window and a portion of the second window corresponding to a first input to a focused window of the first window and the second window, and vary a size of the virtual keypad corresponding to a second input to the virtual keypad.

公开(公告)号：US11038018B2

公开(公告)日：2021-06-15

申请号：US16775513

申请日：2020-01-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soojin Jeong ,  Sunwook Kim ,  Junbeom Park ,  Seungmin Song

IPC: H01L29/08 ,  H01L27/088 ,  H01L29/16 ,  H01L29/78

Abstract: A semiconductor device includes an active pattern on a substrate, the active pattern extending in a first direction parallel to an upper surface of the substrate, a gate structure on the active pattern, the gate structure extending in a second direction parallel to the upper surface of the substrate and crossing the first direction, channels spaced apart from each other in a third direction perpendicular to the upper surface of the substrate, each of the channels extending through the gate structure, a source/drain layer on a portion of the active pattern adjacent the gate structure, the source/drain layer contacting the channels, and a sacrificial pattern on an upper surface of each of opposite edges of the portion of the active pattern in the second direction, the sacrificial pattern contacting a lower portion of a sidewall of the source/drain layer and including silicon-germanium.

公开(公告)号：US12289911B2

公开(公告)日：2025-04-29

申请号：US18378710

申请日：2023-10-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soojin Jeong ,  Sunwook Kim ,  Junbeom Park ,  Seungmin Song

IPC: H01L29/08 ,  H01L27/088 ,  H01L29/16 ,  H01L29/78 ,  H10D30/62 ,  H10D62/13 ,  H10D62/832 ,  H10D84/83

Abstract: A semiconductor device includes an active pattern on a substrate, the active pattern extending in a first direction parallel to an upper surface of the substrate, a gate structure on the active pattern, the gate structure extending in a second direction parallel to the upper surface of the substrate and crossing the first direction, channels spaced apart from each other in a third direction perpendicular to the upper surface of the substrate, each of the channels extending through the gate structure, a source/drain layer on a portion of the active pattern adjacent the gate structure, the source/drain layer contacting the channels, and a sacrificial pattern on an upper surface of each of opposite edges of the portion of the active pattern in the second direction, the sacrificial pattern contacting a lower portion of a sidewall of the source/drain layer and including silicon-germanium.

公开(公告)号：US20250015157A1

公开(公告)日：2025-01-09

申请号：US18599943

申请日：2024-03-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Beomjin Park ,  Myung Gil Kang ,  Dongwon Kim ,  Younggwon Kim ,  Jongsu Kim ,  Hyumin Yoo ,  Soojin Jeong

IPC: H01L29/423 ,  H01L27/088 ,  H01L29/06 ,  H01L29/417 ,  H01L29/775 ,  H01L29/786

Abstract: The present disclosure relates to semiconductor devices and their fabrication methods. An example semiconductor device comprises a substrate including an active pattern, a channel pattern including semiconductor patterns, a source/drain pattern connected to the semiconductor patterns, an inner gate electrode between two neighboring semiconductor patterns, an inner gate dielectric layer, and an inner high-k dielectric layer between the inner gate electrode and the inner gate dielectric layer. The inner gate dielectric layer includes an upper dielectric layer, a lower dielectric layer, and an inner spacer. A first thickness of the inner spacer is greater than a second thickness of the upper or lower dielectric layer. The first thickness is greater than a third thickness of the inner high-k dielectric layer.

公开(公告)号：US11791381B2

公开(公告)日：2023-10-17

申请号：US18096663

申请日：2023-01-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soojin Jeong ,  Sunwook Kim ,  Junbeom Park ,  Seungmin Song

IPC: H01L29/08 ,  H01L27/088 ,  H01L29/16 ,  H01L29/78

CPC classification number: H01L29/0847 ,  H01L27/0886 ,  H01L29/1608 ,  H01L29/7854

Abstract: A semiconductor device includes an active pattern on a substrate, the active pattern extending in a first direction parallel to an upper surface of the substrate, a gate structure on the active pattern, the gate structure extending in a second direction parallel to the upper surface of the substrate and crossing the first direction, channels spaced apart from each other in a third direction perpendicular to the upper surface of the substrate, each of the channels extending through the gate structure, a source/drain layer on a portion of the active pattern adjacent the gate structure, the source/drain layer contacting the channels, and a sacrificial pattern on an upper surface of each of opposite edges of the portion of the active pattern in the second direction, the sacrificial pattern contacting a lower portion of a sidewall of the source/drain layer and including silicon-germanium.

公开(公告)号：US12211942B2

公开(公告)日：2025-01-28

申请号：US17398504

申请日：2021-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soojin Jeong ,  Myunggil Kang ,  Junggil Yang ,  Junbeom Park

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

Abstract: A semiconductor device includes a first source/drain, a second source/drain isolated from direct contact with the first source/drain in a horizontal direction, a channel extending between the first source/drain and the second source/drain, a gate surrounding the channel, an upper inner spacer between the gate and the first source/drain and above the channel, and a lower inner spacer between the gate and the first source/drain and under the channel, in which the channel includes a base portion extending between the first source/drain and the second source/drain, an upper protrusion portion protruding upward from a top surface of the base portion, and a lower protrusion portion protruding downward from a bottom surface of the base portion, and a direction in which a top end of the upper protrusion portion is isolated from direct contact with a bottom end of the lower protrusion portion is oblique with respect to a vertical direction.

公开(公告)号：US20240321956A1

公开(公告)日：2024-09-26

申请号：US18614804

申请日：2024-03-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woosuk Choi ,  Beomjin Park ,  Myunggil Kang ,  Dongwon Kim ,  Hyumin Yoo ,  Soojin Jeong

IPC: H01L29/06 ,  H01L27/088 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/0665 ,  H01L27/088 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/775 ,  H01L29/78696

Abstract: An integrated circuit device includes a fin-type active region that protrudes from a substrate and extends in a first horizontal direction, a plurality of nanosheets disposed on the fin-type active region and separated from each other in the vertical direction, a gate line that extends in a second horizontal direction and that surrounds the plurality of nanosheets on the fin-type active region, and includes respective sub-gate portions between the plurality of nanosheets and a main gate portion above the uppermost layer of the plurality of nanosheets, a source/drain region disposed on the fin-type active region, adjacent to the gate line, and connected to the plurality of nanosheets, and a plurality of inner spacers interposed between the gate line and the source/drain region. The shapes of first inner spacers that face the sub-gate portions differ from the shape of a second inner spacer that faces the main gate portion.

公开(公告)号：US11557653B2

公开(公告)日：2023-01-17

申请号：US17345241

申请日：2021-06-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soojin Jeong ,  Sunwook Kim ,  Junbeom Park ,  Seungmin Song

IPC: H01L29/08 ,  H01L29/78 ,  H01L29/16 ,  H01L27/088

Abstract: A semiconductor device includes an active pattern on a substrate, the active pattern extending in a first direction parallel to an upper surface of the substrate, a gate structure on the active pattern, the gate structure extending in a second direction parallel to the upper surface of the substrate and crossing the first direction, channels spaced apart from each other in a third direction perpendicular to the upper surface of the substrate, each of the channels extending through the gate structure, a source/drain layer on a portion of the active pattern adjacent the gate structure, the source/drain layer contacting the channels, and a sacrificial pattern on an upper surface of each of opposite edges of the portion of the active pattern in the second direction, the sacrificial pattern contacting a lower portion of a sidewall of the source/drain layer and including silicon-germanium.