公开(公告)号：US11380386B2

公开(公告)日：2022-07-05

申请号：US17147557

申请日：2021-01-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soo-Woong Lee ,  Doo-Ho Cho ,  Sang Soo Park ,  Yongkyu Lee

IPC: G11C16/12 ,  G11C11/4091 ,  G11C11/4094 ,  G11C11/4074 ,  G11C11/4076 ,  G11C11/4093 ,  G11C16/04 ,  G11C16/34 ,  G11C16/32 ,  G11C16/28

Abstract: Disclosed is a nonvolatile memory device, which includes a memory cell array that includes a plurality of memory cells, a page buffer circuit that is connected with the memory cell array through a plurality of bit lines and performs a sensing operation of sensing memory cells selected from the plurality of memory cells through the plurality of bit lines during a sensing time, an input/output circuit that performs a data output operation of outputting data from the page buffer circuit to an external device through data lines, and a sensing time control circuit that adjusts the sensing time when the data output operation is performed during the sensing time.

公开(公告)号：US10565154B2

公开(公告)日：2020-02-18

申请号：US16056691

申请日：2018-08-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jiwoong Kwon ,  Soo-Woong Lee

IPC: G06F13/00 ,  G06F13/42 ,  G06F1/12

Abstract: A mobile device includes a slave device that receives first data provided to a serial data line in synchronization with a clock signal provided through a serial clock line, and outputs second data to the serial data line in synchronization with the clock signal; and a master device that generates the clock signal and provides the first data to the serial data line in synchronization with the generated clock signal, or receives the second data output to the serial data line in synchronization with the clock signal. The master device generates the clock signal of a first frequency upon transmitting the first data, and generates the clock signal of a second frequency, which is lower than the first frequency, upon receiving the second data.

公开(公告)号：US11550503B2

公开(公告)日：2023-01-10

申请号：US16899968

申请日：2020-06-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Ryong Park ,  Soo-Woong Lee ,  Youn-Soo Cheon

IPC: G06F3/06 ,  G01K13/00 ,  G06F9/4401 ,  G01K3/00

Abstract: A storage device includes a memory and a memory controller which transmits a command to the memory. The memory includes at least one memory cell array, a memory temperature sensor which measures a temperature of the memory, and a control logic. The control logic outputs a busy signal in response to the command, receives the temperature of the memory from the memory temperature sensor in response to the command, and determines whether to perform a command operation according to the command on the memory cell array based on the received temperature of the memory.

公开(公告)号：US11205484B2

公开(公告)日：2021-12-21

申请号：US16752924

申请日：2020-01-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soo-Woong Lee ,  Hyun-Jin Kim ,  Jae-Yong Jeong

IPC: G11C7/10 ,  G11C16/10 ,  G11C16/26 ,  G11C16/08 ,  G11C16/32 ,  G11C16/24

Abstract: A non-volatile memory device includes a memory cell array including a plurality of memory cells, a page buffer circuit, and a control logic circuit. The page buffer circuit includes a plurality of first page buffers and a plurality of second page buffers, each including a sense latch, a data latch, and a cache latch. The sense latch senses data stored in the memory cell array and dumps the sensed data to the data latch, the data latch dumps the data dumped by the sense latch to the cache latch, and the cache latch transmits the data dumped by the data latch to a data I/O circuit. While the cache latch included in at least one of the plurality of first page buffers is performing a data transmit operation, the data latch included in at least one of the plurality of second page buffers performs a data dumping operation.

公开(公告)号：US20210096775A1

公开(公告)日：2021-04-01

申请号：US16899968

申请日：2020-06-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Ryong Park ,  Soo-Woong Lee ,  Youn-Soo Cheon

IPC: G06F3/06 ,  G06F9/4401 ,  G01K3/00 ,  G01K13/00

Abstract: A storage device includes a memory and a memory controller which transmits a command to the memory. The memory includes at least one memory cell array, a memory temperature sensor which measures a temperature of the memory, and a control logic. The control logic outputs a busy signal in response to the command, receives the temperature of the memory from the memory temperature sensor in response to the command, and determines whether to perform a command operation according to the command on the memory cell array based on the received temperature of the memory.

公开(公告)号：US09543032B2

公开(公告)日：2017-01-10

申请号：US14518176

申请日：2014-10-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangchul Kang ,  Seokcheon Kwon ,  Soo-Woong Lee

IPC: G11C16/04 ,  G11C16/30 ,  G11C11/56 ,  G11C16/06 ,  G11C16/10 ,  G11C16/34

CPC classification number: G11C16/30 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/06 ,  G11C16/10 ,  G11C16/3436

Abstract: A non-volatile memory device includes a non-volatile memory cell array including a plurality of word lines, a voltage generator configured to generate a first high-voltage using a supply voltage and a second high-voltage using an external voltage which is higher than the supply voltage, and a word line selection circuit configured. The word line selection circuit is configured apply, during a program operation of the memory cell array, the first high-voltage to a selected word line among the plurality of word lines, and the second high-voltage to unselected word lines among the plurality of word lines.

Abstract translation: 一种非易失性存储器件包括包括多个字线的非易失性存储单元阵列，电压发生器，其被配置为使用高于该电压的外部电压产生使用电源电压的第一高电压和第二高电压， 电源电压和配置的字线选择电路。 字线选择电路被配置为在存储单元阵列的编程操作期间将第一高电压施加到多个字线中的选定字线，并且多个字线中的第二高电压至未选字线 字线。