公开(公告)号：US20220130581A1

公开(公告)日：2022-04-28

申请号：US17350157

申请日：2021-06-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Younghyun Kim ,  Sechung Oh ,  Naoki Hase ,  Heeju Shin ,  Junghwan Park

IPC: H01F10/32 ,  H01L43/02 ,  H01L27/22

Abstract: A magnetic device includes a fixed layer including a fixed pattern, a free layer, and a tunnel barrier between the fixed layer and the free layer. The fixed pattern includes a first magnetic pattern, a second magnetic pattern, and a hybrid spacer, including a nonmagnetic material layer, between the first magnetic pattern and the second magnetic pattern, the nonmagnetic material including a plurality of magnetic nanoparticles dispersed therein.

公开(公告)号：US10211396B2

公开(公告)日：2019-02-19

申请号：US15943698

申请日：2018-04-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juhyun Kim ,  Kiwoong Kim ,  Sechung Oh ,  Woochang Lim

IPC: H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: A semiconductor device and a method of forming the semiconductor device are disclosed. The semiconductor device includes a lower electrode and a magnetic tunnel junction structure disposed on the lower electrode. The magnetic tunnel junction structure includes a seed pattern disposed on the lower electrode. The seed pattern includes an amorphous seed layer and an oxidized seed layer disposed on a surface of the amorphous seed layer. The seed pattern may prevent the lattice structure of the lower electrode from adversely affecting the lattice structure of a pinned magnetic layer of the magnetic tunnel junction structure.

公开(公告)号：US09978932B2

公开(公告)日：2018-05-22

申请号：US15057101

申请日：2016-02-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyungjoon Kwon ,  Sechung Oh ,  Vladimir Urazaev ,  Ken Tokashiki ,  Jongchul Park ,  Gwang-Hyun Baek ,  Jaehun Seo ,  Sangmin Lee

IPC: H01L43/02 ,  H01L43/08 ,  H01L27/22 ,  G11C11/16 ,  H01L45/00 ,  H01L27/24 ,  H01L43/10

CPC classification number: H01L43/08 ,  G11C11/161 ,  H01L27/222 ,  H01L27/228 ,  H01L27/2436 ,  H01L27/2463 ,  H01L43/02 ,  H01L43/10 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148

Abstract: Provided are semiconductor devices and methods of fabricating the same. The semiconductor device may include lower wires, upper wires crossing the lower wires, select elements provided at intersections between the lower and upper wires, and memory elements provided between the select elements and the upper wires. Each of the memory elements may include a lower electrode having a top width greater than a bottom width, and a data storage layer including a plurality of magnetic layers stacked on a top surface of the lower electrode and having a rounded edge.

公开(公告)号：US11944014B2

公开(公告)日：2024-03-26

申请号：US17358435

申请日：2021-06-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghwan Park ,  Jaehoon Kim ,  Yongsung Park ,  Hyeonwoo Seo ,  Sechung Oh ,  Hyun Cho

IPC: H10N50/10 ,  G11C11/16 ,  H10B61/00 ,  H10N50/80 ,  H10N50/85

CPC classification number: H10N50/10 ,  G11C11/161 ,  H10B61/22 ,  H10N50/80 ,  H10N50/85

Abstract: A magnetic memory device including a magnetic tunnel junction is provided. The magnetic tunnel junction includes a fixed layer, a polarization enhancement structure on the fixed layer, a tunnel barrier layer on the polarization enhancement structure, and a free layer on the tunnel barrier layer, wherein the polarization enhancement structure includes a plurality of polarization enhancement layers and at least one spacer layer which separates the plurality of polarization enhancement layers from each other. A thickness of each of the plurality of polarization enhancement layers is from 5 Å to about 20 Å, and a thickness of the at least one spacer layer is from about 2 Å to about 15 Å.

公开(公告)号：US20190013462A1

公开(公告)日：2019-01-10

申请号：US16114964

申请日：2018-08-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Chul Lee ,  Ki Woong Kim ,  Sang Hwan Park ,  Sechung Oh

IPC: H01L43/08 ,  H01L27/22 ,  H01L43/12 ,  H01F10/32 ,  H01F10/12 ,  H01L43/10

CPC classification number: H01L43/08 ,  H01F10/12 ,  H01F10/3204 ,  H01F10/3272 ,  H01L27/222 ,  H01L43/10 ,  H01L43/12

Abstract: A magnetic memory device includes a reference magnetic structure, a free magnetic structure, and a tunnel barrier pattern between the reference magnetic structure and the free magnetic structure. The reference magnetic structure includes a first pinned pattern, a second pinned pattern between the first pinned pattern and the tunnel barrier pattern, and an exchange coupling pattern between the first and the second pinned pattern. The second pinned pattern includes a first magnetic pattern adjacent the exchange coupling pattern, a second magnetic pattern adjacent the tunnel barrier pattern, a third magnetic pattern between the first and the second magnetic pattern, a first non-magnetic pattern between the first and the third magnetic pattern, and a second non-magnetic pattern between the second and the third magnetic pattern. The first non-magnetic pattern has a different crystal structure from the second non-magnetic pattern, and at least a portion of the third magnetic pattern is amorphous.

公开(公告)号：US09691967B2

公开(公告)日：2017-06-27

申请号：US15185693

申请日：2016-06-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangyong Kim ,  Whankyun Kim ,  Sechung Oh

IPC: H01L43/02 ,  H01L43/08

CPC classification number: H01L43/02 ,  G11C11/161 ,  H01L43/08

Abstract: Magnetic memory cells include a magnetic tunnel junction and a first electrode, which is electrically coupled to the magnetic tunnel junction by a first conductive structure. This conductive structure includes a blocking layer and a seed layer, which extends between the blocking layer and the magnetic tunnel junction. The blocking layer is formed as an amorphous metal compound. In some of the embodiments, the blocking layer is a thermally treated layer and an amorphous state of the blocking layer is maintained during and post thermal treatment.

公开(公告)号：US08847341B2

公开(公告)日：2014-09-30

申请号：US13926048

申请日：2013-06-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jangeun Lee ,  Sechung Oh ,  Jeahyoung Lee ,  Woojin Kim ,  Junho Jeong ,  Woo Chang Lim

IPC: H01L43/02 ,  H01F10/32 ,  B82Y25/00 ,  H01L43/08 ,  H01F10/12

CPC classification number: H01L43/10 ,  B82Y25/00 ,  G11C11/161 ,  H01F10/123 ,  H01F10/3254 ,  H01F10/3272 ,  H01F10/3286 ,  H01L27/222 ,  H01L43/02 ,  H01L43/08

Abstract: A magnetic memory device is provided. The magnetic memory device includes a first vertical magnetic layer and a second vertical magnetic layer on a substrate, a tunnel barrier layer between the fist vertical magnetic layer and the second vertical magnetic layer, and an exchange-coupling layer between a first sub-layer of the first vertical magnetic layer and a second sub-layer of the first vertical magnetic layer.

Abstract translation: 提供磁存储器件。 磁存储器件包括第一垂直磁性层和衬底上的第二垂直磁性层，第一垂直磁性层和第二垂直磁性层之间的隧道势垒层，以及在第一垂直磁性层之间的交换耦合层， 第一垂直磁性层和第一垂直磁性层的第二子层。

公开(公告)号：US12029134B2

公开(公告)日：2024-07-02

申请号：US17402960

申请日：2021-08-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sanghwan Park ,  Younghyun Kim ,  Jaehoon Kim ,  Heeju Shin ,  Sechung Oh

IPC: H10N50/85 ,  H01L23/522 ,  H01L23/528 ,  H10B61/00 ,  H10N50/10 ,  H10N50/80

CPC classification number: H10N50/10 ,  H01L23/5226 ,  H01L23/5283 ,  H10B61/22 ,  H10N50/80 ,  H10N50/85

Abstract: A semiconductor device including a substrate; a lower electrode on the substrate; a magnetic tunnel junction structure on the lower electrode, the magnetic tunnel junction structure including a pinned layer, a tunnel barrier layer, and a free layer which are sequentially stacked; an upper electrode on the magnetic tunnel junction structure; and an oxidation control layer between the free layer and the upper electrode, the oxidation control layer including at least one filter layer and at least one oxide layer, wherein the at least one filter layer includes MoCoFe.

公开(公告)号：US11935677B2

公开(公告)日：2024-03-19

申请号：US17350157

申请日：2021-06-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Younghyun Kim ,  Sechung Oh ,  Naoki Hase ,  Heeju Shin ,  Junghwan Park

IPC: H01F10/32 ,  G11C11/16 ,  H01F1/00 ,  H10B61/00 ,  H10N50/10 ,  H10N50/80 ,  H10N50/85

CPC classification number: H01F10/3254 ,  H01F1/0063 ,  H01F10/3272 ,  H01F10/329 ,  H10B61/22 ,  H10N50/10 ,  H10N50/80 ,  G11C11/161 ,  H10N50/85

Abstract: A magnetic device includes a fixed layer including a fixed pattern, a free layer, and a tunnel barrier between the fixed layer and the free layer. The fixed pattern includes a first magnetic pattern, a second magnetic pattern, and a hybrid spacer, including a nonmagnetic material layer, between the first magnetic pattern and the second magnetic pattern, the nonmagnetic material including a plurality of magnetic nanoparticles dispersed therein.

公开(公告)号：US20210043833A1

公开(公告)日：2021-02-11

申请号：US16840741

申请日：2020-04-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungmin Lee ,  Younghyun Kim ,  Junghwan Park ,  Sechung Oh ,  Kyungil Hong

IPC: H01L43/12 ,  H01L43/08 ,  H01L21/02 ,  H01L27/22

Abstract: In a method of manufacturing a magnetoresistive random access memory, a memory structure may be formed on a substrate. The memory structure may include a lower electrode, a magnetic tunnel junction (MTJ) structure, and an upper electrode sequentially stacked. A protection layer including silicon nitride may be formed to cover a surface of the memory structure. The protection layer may be formed by a chemical vapor deposition process using plasma and introducing deposition gases including a silicon source gas, a nitrogen source gas containing no hydrogen and a dissociation gas. Damages of the MTJ structure may be decreased during forming the protection layer. Thus, the MRAM may have improved characteristics.