公开(公告)号：US11944014B2

公开(公告)日：2024-03-26

申请号：US17358435

申请日：2021-06-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghwan Park ,  Jaehoon Kim ,  Yongsung Park ,  Hyeonwoo Seo ,  Sechung Oh ,  Hyun Cho

IPC: H10N50/10 ,  G11C11/16 ,  H10B61/00 ,  H10N50/80 ,  H10N50/85

CPC classification number: H10N50/10 ,  G11C11/161 ,  H10B61/22 ,  H10N50/80 ,  H10N50/85

Abstract: A magnetic memory device including a magnetic tunnel junction is provided. The magnetic tunnel junction includes a fixed layer, a polarization enhancement structure on the fixed layer, a tunnel barrier layer on the polarization enhancement structure, and a free layer on the tunnel barrier layer, wherein the polarization enhancement structure includes a plurality of polarization enhancement layers and at least one spacer layer which separates the plurality of polarization enhancement layers from each other. A thickness of each of the plurality of polarization enhancement layers is from 5 Å to about 20 Å, and a thickness of the at least one spacer layer is from about 2 Å to about 15 Å.

公开(公告)号：US20220158085A1

公开(公告)日：2022-05-19

申请号：US17358435

申请日：2021-06-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghwan Park ,  Jaehoon Kim ,  Yongsung Park ,  Hyeonwoo Seo ,  Sechung Oh ,  Hyun Cho

IPC: H01L43/08 ,  H01L43/02 ,  H01L27/22 ,  H01L43/10

Abstract: A magnetic memory device including a magnetic tunnel junction is provided. The magnetic tunnel junction includes a fixed layer, a polarization enhancement structure on the fixed layer, a tunnel barrier layer on the polarization enhancement structure, and a free layer on the tunnel barrier layer, wherein the polarization enhancement structure includes a plurality of polarization enhancement layers and at least one spacer layer which separates the plurality of polarization enhancement layers from each other. A thickness of each of the plurality of polarization enhancement layers is from 5 Å to about 20 Å, and a thickness of the at least one spacer layer is from about 2 Å to about 15 Å.

公开(公告)号：US20230371392A1

公开(公告)日：2023-11-16

申请号：US18118571

申请日：2023-03-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yoonyoung LEE ,  Sanghwan Park ,  Yongsung Park ,  Jeongheon Park ,  Hyeonwoo Seo

IPC: H10N50/10 ,  H10B61/00 ,  H10N50/85 ,  H01L23/528 ,  H10B80/00 ,  H01L25/16

CPC classification number: H10N50/10 ,  H10B61/22 ,  H10N50/85 ,  H01L23/5283 ,  H10B80/00 ,  H01L25/16

Abstract: A magnetoresistive memory device includes: a lower electrode; a lower magnetic material layer on the lower electrode; a tunnel barrier layer on the lower magnetic material layer; an upper magnetic material layer on the tunnel barrier layer; a cap structure, on the upper magnetic material layer, including first layers and second layers, alternately layered; a cap conductive layer on the cap structure; and an upper electrode on the cap conductive layer, wherein the first layers include a first material including a non-magnetic material, and the second layers include a second material including a magnetic material.

公开(公告)号：US11706931B2

公开(公告)日：2023-07-18

申请号：US17230029

申请日：2021-04-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Hoon Kim ,  Sang Hwan Park ,  Yong-Sung Park ,  Hyeonwoo Seo ,  Se Chung Oh ,  Hyun Cho

IPC: H10B61/00 ,  H10B63/00

CPC classification number: H10B61/22 ,  H10B63/34 ,  H10B63/845

Abstract: A variable resistance memory device including a substrate; horizontal structures spaced apart from each other in a first direction perpendicular to a top surface of the substrate; variable resistance patterns on the horizontal structures, respectively; and conductive lines on the variable resistance patterns, respectively, wherein each of the horizontal structures includes a first electrode pattern, a semiconductor pattern, and a second electrode pattern arranged along a second direction parallel to the top surface of the substrate, and each of the variable resistance patterns is between one of the second electrode patterns and a corresponding one of the conductive lines.