公开(公告)号：US20220102427A1

公开(公告)日：2022-03-31

申请号：US17230029

申请日：2021-04-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Hoon KIM ,  Sang Hwan PARK ,  Yong-Sung PARK ,  Hyeonwoo SEO ,  Se Chung OH ,  Hyun CHO

IPC: H01L27/22 ,  H01L27/24

Abstract: A variable resistance memory device including a substrate; horizontal structures spaced apart from each other in a first direction perpendicular to a top surface of the substrate; variable resistance patterns on the horizontal structures, respectively; and conductive lines on the variable resistance patterns, respectively, wherein each of the horizontal structures includes a first electrode pattern, a semiconductor pattern, and a second electrode pattern arranged along a second direction parallel to the top surface of the substrate, and each of the variable resistance patterns is between one of the second electrode patterns and a corresponding one of the conductive lines.

公开(公告)号：US20200152251A1

公开(公告)日：2020-05-14

申请号：US16552110

申请日：2019-08-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki Woong KIM ,  Juhyun KIM ,  Se Chung OH ,  Ung Hwan PI

IPC: G11C11/16 ,  H01L27/22 ,  H01L43/02 ,  H01L43/10 ,  H01L43/12

Abstract: A magnetic memory device includes a first conductive line extending in a first direction on a substrate, a first magnetic pattern on the first conductive line, the first magnetic pattern including a first portion and a second portion that have different thicknesses, and a second conductive line on the first magnetic pattern and extending in a second direction intersecting the first direction.

公开(公告)号：US20220235450A1

公开(公告)日：2022-07-28

申请号：US17721428

申请日：2022-04-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Woong KIM ,  Hyeon Woo SEO ,  Hee Ju SHIN ,  Se Chung OH ,  Hyun CHO

IPC: C23C14/34 ,  C23C14/35 ,  H01J37/32 ,  C23C14/08

Abstract: A sputtering apparatus including a chamber, a stage inside the chamber and configured to receive a substrate thereon, a first sputter gun configured to provide a sputtering source to an inside of the chamber, a first RF source configured to provide a first power having a first frequency to the first sputter gun, and a second RF source configured to provide a second power having a second frequency to the first sputter gun, the second frequency being lower than the first frequency may be provided.

公开(公告)号：US20220020409A1

公开(公告)日：2022-01-20

申请号：US17202648

申请日：2021-03-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hee Ju SHIN ,  Sang Hwan PARK ,  Se Chung OH ,  Ki Woong KIM ,  Hyeon Woo SEO

IPC: G11C11/16 ,  H01F10/32 ,  H01L43/08 ,  H01L43/10 ,  H01L43/02 ,  H01L43/12

Abstract: A magnetic memory device includes a pinned layer, a free layer, a tunnel barrier layer between the pinned layer and the free layer, a first oxide layer spaced apart from the tunnel barrier layer with the free layer therebetween, and a second oxide layer spaced apart from the free layer with the first oxide layer therebetween. The first oxide layer includes an oxide of a first material and may have a thickness of 0.3 Å to 2.0 Å. The second oxide layer may include an oxide of a second material and may have a thickness of 0.1 Å to 5.0 Å. A first oxygen affinity of the first material may be greater than a second oxygen affinity of the second material.

公开(公告)号：US20240423097A1

公开(公告)日：2024-12-19

申请号：US18525322

申请日：2023-11-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JeongMok KIM ,  Juhyun KIM ,  Se Chung OH ,  Junho Jeong

IPC: H10N50/20 ,  H10B61/00 ,  H10N50/01 ,  H10N50/85

Abstract: A memory device comprising a reference magnetic pattern and a free magnetic pattern sequentially stacked on a substrate; and a tunnel barrier pattern between the reference magnetic pattern and the free magnetic pattern, wherein the reference magnetic pattern includes: a first pinning pattern; a second pinning pattern between the first pinning pattern and the tunnel barrier pattern; and an exchange coupling pattern between the first pinning pattern and the second pinning pattern, the exchange coupling pattern antiferromagnetically coupling the first pinning pattern and the second pinning pattern, wherein the first pinning pattern includes: a first magnetic pattern; and a second magnetic pattern between the first magnetic pattern and the exchange coupling pattern, the first magnetic pattern is a single layer including an alloy of a first ferromagnetic element and a first non-magnetic metal element, and wherein the second magnetic pattern is a single layer including a second ferromagnetic element.

公开(公告)号：US20240284802A1

公开(公告)日：2024-08-22

申请号：US18242084

申请日：2023-09-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hee Ju SHIN ,  Se Chung OH ,  Jun Ho JEONG

IPC: H10N50/20 ,  H10B61/00 ,  H10N50/01 ,  H10N50/80 ,  H10N50/85

CPC classification number: H10N50/20 ,  H10B61/22 ,  H10N50/01 ,  H10N50/80 ,  H10N50/85

Abstract: A magnetic memory device and a method for fabricating the same are provided. The magnetic memory device includes a pinned layer pattern, a free layer pattern including boron (B), a tunnel barrier layer pattern between the pinned layer pattern and the free layer pattern, an oxide layer pattern spaced apart from the tunnel barrier layer pattern with the free layer pattern therebetween, the oxide layer pattern including a metal borate, and a capping layer pattern spaced apart from the free layer pattern with the oxide layer pattern therebetween, the capping layer pattern including a metal boride, wherein a difference between a boron concentration of the free layer pattern and a boron concentration of the oxide layer pattern is 10 at % or less, and a difference between the boron concentration of the oxide layer pattern and a boron concentration of the capping layer pattern is 10 at % or less.

公开(公告)号：US20220254994A1

公开(公告)日：2022-08-11

申请号：US17466246

申请日：2021-09-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungil HONG ,  Jungmin LEE ,  Younghyun KIM ,  Junghwan PARK ,  Heeju SHIN ,  Se Chung OH

IPC: H01L43/12 ,  H01L43/08 ,  H01L43/02 ,  H01L43/10 ,  H01L27/22 ,  G11C11/16

Abstract: A method of fabricating a magnetic memory device comprises forming, on a substrate, a data storage structure including a bottom electrode, a magnetic tunnel junction pattern, and a top electrode, forming a first capping dielectric layer conformally covering lateral and top surfaces of the data storage structure, and forming a second capping dielectric layer on the first capping dielectric layer. The forming the first capping dielectric layer is performed by PECVD in which a first source gas, a first reaction gas, and a first purging gas are supplied. The forming the second capping dielectric layer Is performed by PECVD in which a second source gas, a second reaction gas, and a second purging gas are supplied. The first and second reaction gases are different from each other. The first and second purging gases are different from each other.

公开(公告)号：US20190189906A1

公开(公告)日：2019-06-20

申请号：US16028688

申请日：2018-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Chul LEE ,  Se Chung OH ,  Sangjun YUN ,  Jae Hoon KIM ,  KyungTae NAM ,  Eunsun NOH

IPC: H01L43/02 ,  H01L43/12 ,  H01L27/22 ,  G11C11/16 ,  H01L43/10

CPC classification number: H01L43/02 ,  G11C11/161 ,  H01L27/222 ,  H01L43/10 ,  H01L43/12

Abstract: A magnetic memory device includes a substrate, a tunnel barrier pattern on the substrate, a first magnetic pattern and a second magnetic pattern spaced apart from each other with the tunnel barrier pattern therebetween, and a short preventing pattern spaced apart from the tunnel barrier pattern with the second magnetic pattern therebetween. The short preventing pattern includes at least two oxide layers and at least two metal layers, which are alternately stacked.

公开(公告)号：US20190136368A1

公开(公告)日：2019-05-09

申请号：US15980348

申请日：2018-05-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki Woong KIM ,  Woojin KIM ,  Sang Hwan PARK ,  Heeju SHIN ,  Se Chung OH

IPC: C23C14/35 ,  H01L43/10 ,  H01L43/12 ,  C23C14/34 ,  H01J37/34

Abstract: Provided are sputtering apparatuses and methods of manufacturing magnetic memory devices. The sputtering apparatus includes a process chamber, a stage in the process chamber and configured to load a substrate thereon, and a first sputter gun above the substrate in the process chamber. The first sputter gun is horizontally spaced apart from the substrate. The first sputter gun includes a first target including a first end and a second end, the first end being horizontally closer to the substrate than the second end. A first surface of the first target is inclined relative to a top surface of the substrate. A height of the second end of the first target relative to the top surface of the substrate is greater than that of the first end of the first target.