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    SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
    2.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME 审中-公开

    公开(公告)号：US20230189524A1

    公开(公告)日：2023-06-15

    申请号：US17884853

    申请日：2022-08-10

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Min Gu KANG ,  Sang Don ZOO ,  Joon Sung KIM ,  Junghwan PARK ,  Seorim MOON ,  Seok Cheon BAEK ,  Cheol RYOU ,  Sun Young LEE ,  Cheol-Min LIM

    IPC: H01L27/11582 ,  H01L23/535

    CPC classification number: H01L27/11582 ,  H01L23/535

    Abstract: A semiconductor memory device may include a substrate including a first and a second block region, and a stacked structure including insulating films and gate electrodes alternately stacked on the substrate. A vertical channel structure, a word line cut structure, and a block cut structure may penetrate the stacked structure. The word line cut structure may extend in a second direction. The block cut structure may extend in a first direction, connect to the word line cut structure, and define the first and second block regions. The block cut structure may include a first portion connected to the word line cut structure and a second portion connected to the first portion. From a planar viewpoint, the first portion may include at least a part not overlapping the second portion in the first direction and at least a region not overlapping the word line cut structure in the first direction.

    MEMORY DEVICE AND AN OPERATING METHOD THEREOF
    4.
    发明申请
    MEMORY DEVICE AND AN OPERATING METHOD THEREOF 有权

    公开(公告)号：US20220068318A1

    公开(公告)日：2022-03-03

    申请号：US17215914

    申请日：2021-03-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sangyun KIM ,  Kyungryun KIM ,  Junghwan PARK ,  Yeonkyu CHOI

    IPC: G11C5/14 ,  G11C7/06 ,  G11C7/22

    Abstract: A memory device includes: a first circuit; a second circuit; and an adaptive body bias generator configured to receive frequency detection information or temperature detection information, to apply a first forward body bias or a first reverse body bias to the first circuit in response to the frequency detection information or the temperature detection information, and to apply a second forward body bias or a second reverse body bias to the second circuit in response to the frequency detection information or the temperature detection information.

    SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME 有权

    公开(公告)号：US20230005955A1

    公开(公告)日：2023-01-05

    申请号：US17742043

    申请日：2022-05-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sanghun CHUN ,  Kwangyoung JUNG ,  Youngji NOH ,  Junghwan PARK ,  Jeehoon HAN

    IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11565

    Abstract: A semiconductor device includes a substrate, gate electrodes stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the substrate, channel structures penetrating the gate electrodes, extending in the first direction, and each including a channel layer, separation regions penetrating the gate electrodes, extending in the first direction and a second direction perpendicular to the first direction, and spaced apart from each other in a third direction perpendicular to the first direction and the second direction, and crack prevention layers disposed on at least a portion of the separation regions, wherein each of the separation regions includes a lower region and upper regions spaced apart from each other in the second direction on the lower region and protruding upwardly from the lower region, and wherein the crack prevention layers are in contact with upper surfaces of the upper regions.

    SEMICONDUCTOR DEVICES
    9.
    发明申请
    SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20200312852A1

    公开(公告)日：2020-10-01

    申请号：US16902338

    申请日：2020-06-16

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ho-In RYU ,  Taiheui CHO ,  Keunnam KIM ,  Kyehee YEOM ,  Junghwan PARK ,  Hyeon-Woo JANG

    IPC: H01L27/105 ,  H01L27/108 ,  H01L29/423

    Abstract: A semiconductor device includes a substrate including a cell region and a peripheral region, a cell gate electrode buried in a groove crossing a cell active portion of the cell region, a cell line pattern crossing over the cell gate electrode, the cell line pattern being connected to a first source/drain region in the cell active portion at a side of the cell gate electrode, a peripheral gate pattern crossing over a peripheral active portion of the peripheral region, a planarized interlayer insulating layer on the substrate around the peripheral gate pattern, and a capping insulating layer on the planarized interlayer insulating layer and a top surface of the peripheral gate pattern, the capping insulating layer including an insulating material having an etch selectivity with respect to the planarized interlayer insulating layer.

    MAGNETIC MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
    10.
    发明申请
    MAGNETIC MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 有权

    公开(公告)号：US20220254994A1

    公开(公告)日：2022-08-11

    申请号：US17466246

    申请日：2021-09-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyungil HONG ,  Jungmin LEE ,  Younghyun KIM ,  Junghwan PARK ,  Heeju SHIN ,  Se Chung OH

    IPC: H01L43/12 ,  H01L43/08 ,  H01L43/02 ,  H01L43/10 ,  H01L27/22 ,  G11C11/16

    Abstract: A method of fabricating a magnetic memory device comprises forming, on a substrate, a data storage structure including a bottom electrode, a magnetic tunnel junction pattern, and a top electrode, forming a first capping dielectric layer conformally covering lateral and top surfaces of the data storage structure, and forming a second capping dielectric layer on the first capping dielectric layer. The forming the first capping dielectric layer is performed by PECVD in which a first source gas, a first reaction gas, and a first purging gas are supplied. The forming the second capping dielectric layer Is performed by PECVD in which a second source gas, a second reaction gas, and a second purging gas are supplied. The first and second reaction gases are different from each other. The first and second purging gases are different from each other.

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