公开(公告)号：US20190067258A1

公开(公告)日：2019-02-28

申请号：US15960698

申请日：2018-04-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Young KIM ,  PYOUNGWAN KIM ,  HYUNKI KIM ,  Junwoo PARK ,  Sangsoo KIM ,  Seung Hwan KIM ,  Sung-Kyu PARK ,  Insup SHIN

IPC: H01L25/11 ,  H01L25/00

CPC classification number: H01L25/117 ,  H01L21/561 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16227 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2225/1082 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2224/81

Abstract: Disclosed are a semiconductor package and a method of fabricating the same. The semiconductor package comprises a lower semiconductor chip on a lower substrate, a lower molding layer covering the lower semiconductor chip on the lower substrate and including a molding cavity that extends toward the lower semiconductor chip from a top surface of the lower molding layer, an interposer substrate on the top surface of the lower molding layer and including a substrate opening that penetrates the interposer substrate and overlaps the molding cavity, and an upper package on the interposer substrate. The molding cavity has a floor surface spaced apart from the upper package across a substantially hollow space.

公开(公告)号：US20200098734A1

公开(公告)日：2020-03-26

申请号：US16698749

申请日：2019-11-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHANHEE JEONG ,  HYUNKI KIM ,  JUNWOO PARK ,  BYOUNG WOOK JANG ,  SUNCHUL KIM ,  SU-MIN PARK ,  PYOUNGWAN KIM ,  INKU KANG ,  HEEYEOL KIM

IPC: H01L25/10 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L25/00

Abstract: A semiconductor package includes a semiconductor chip disposed on a first substrate, a mold layer covering a sidewall of the semiconductor chip and including a through-hole, a second substrate disposed on the semiconductor chip, a connection terminal disposed between the first substrate and the second substrate and provided in the through-hole, and an underfill resin layer extending from between the semiconductor chip and the second substrate into the through-hole.

公开(公告)号：US20180145061A1

公开(公告)日：2018-05-24

申请号：US15818346

申请日：2017-11-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHANHEE JEONG ,  HYUNKI KIM ,  JUNWOO PARK ,  BYOUNG WOOK JANG ,  SUNCHUL KIM ,  SU-MIN PARK ,  PYOUNGWAN KIM ,  INKU KANG ,  HEEYEOL KIM

IPC: H01L25/10 ,  H01L23/538 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L23/00

CPC classification number: H01L25/105 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5385 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/32 ,  H01L24/48 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/214 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2224/45099 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2924/00

Abstract: A semiconductor package includes a semiconductor chip disposed on a first substrate, a mold layer covering a sidewall of the semiconductor chip and including a through-hole, a second substrate disposed on the semiconductor chip, a connection terminal disposed between the first substrate and the second substrate and provided in the through-hole, and an underfill resin layer extending from between the semiconductor chip and the second substrate into the through-hole.