公开(公告)号：US12057357B2

公开(公告)日：2024-08-06

申请号：US17212417

申请日：2021-03-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyong Hwan Koh ,  Jongwan Kim ,  Juhyeon Oh ,  Yongkwan Lee

IPC: H01L23/48 ,  H01L21/48 ,  H01L21/56 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L23/52 ,  H01L23/00

CPC classification number: H01L23/13 ,  H01L21/4803 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/49838 ,  H01L23/49827 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/06135 ,  H01L2224/48227 ,  H01L2224/49173 ,  H01L2224/73265

Abstract: A semiconductor package includes a base substrate that includes a first surface and a second surface that face each other, a plurality of first metal line patterns disposed on the first surface, a plurality of second metal line patterns disposed on the second surface, a plurality of vias that penetrate the base substrate and connect the first metal line patterns to the second metal line patterns, a semiconductor chip disposed on the first surface, and a molding member that covers the first surface and the semiconductor chip. The base substrate includes at least one recess at a corner of the base substrate. The recess extends from the first surface toward the second surface. The molding member includes a protrusion that fills the recess.

公开(公告)号：US20240421140A1

公开(公告)日：2024-12-19

申请号：US18628182

申请日：2024-04-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sanghoon Lee ,  Yeongbeom Ko ,  Seokgeun Ahn ,  Juhyeon Oh ,  Gwangjae Jeon

IPC: H01L25/18 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48

Abstract: A semiconductor package includes a buffer die, a first core die stack stacked on the buffer die, the first core die stack including at least one first intermediate core and a first gap filling portion covering an outer surface of the at least one first intermediate core, and a second core die stack stacked on the first core die stack, the second core die stack including at least one second intermediate core and a second gap filling portion covering an outer surface of the at least one second intermediate core. The first gap filling portion and the second gap filling portion are directly bonded to each other.

公开(公告)号：US12132007B2

公开(公告)日：2024-10-29

申请号：US18103584

申请日：2023-01-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jongwan Kim ,  Kyong Hwan Koh ,  Juhyeon Oh ,  Yongkwan Lee

IPC: H01L23/552 ,  H01L21/56 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/552 ,  H01L21/568 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/16 ,  H01L2224/16227

Abstract: A semiconductor package including a substrate including at least one ground pad and a ground pattern; a semiconductor chip on the substrate; and a shield layer on the substrate and covering the semiconductor chip, wherein the shield layer extends onto a bottom surface of the substrate and includes an opening region on the bottom surface of the substrate, a bottom surface of the at least one ground pad is at the bottom surface of the substrate, a side surface of the ground pattern is at a side surface of the substrate, and the shield layer on the bottom surface of the substrate is in contact with the bottom surface of the at least one ground pad and in contact with the side surface of the ground pattern.

公开(公告)号：US20240170382A1

公开(公告)日：2024-05-23

申请号：US18504195

申请日：2023-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juhyeon Oh

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L23/522 ,  H01L25/065

CPC classification number: H01L23/49822 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5226 ,  H01L24/08 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/081 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2924/1431 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/1441 ,  H01L2924/181

Abstract: A semiconductor package includes a lower redistribution wiring layer including first redistribution wiring, a semiconductor chip on the lower redistribution wiring layer and electrically connected to the first redistribution wirings, a sealing member on the semiconductor chip on the lower redistribution wiring layer, a plurality of through vias penetrating the sealing member and electrically connected to the first redistribution wirings, an upper redistribution wiring layer on the sealing member and having second redistribution wirings electrically connected to the plurality of through vias. The second redistribution wirings includes buried wirings that are buried in a plurality of recesses formed in an upper surface of the sealing member and electrically connected to the plurality of through vias, and upper redistribution wirings provided in at least one upper insulating layer on the sealing member and electrically connected to the buried wirings.

公开(公告)号：US11581266B2

公开(公告)日：2023-02-14

申请号：US17212035

申请日：2021-03-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jongwan Kim ,  Kyong Hwan Koh ,  Juhyeon Oh ,  Yongkwan Lee

IPC: H01L23/552 ,  H01L23/498 ,  H01L21/56 ,  H01L23/00

Abstract: A semiconductor package including a substrate including at least one ground pad and a ground pattern; a semiconductor chip on the substrate; and a shield layer on the substrate and covering the semiconductor chip, wherein the shield layer extends onto a bottom surface of the substrate and includes an opening region on the bottom surface of the substrate, a bottom surface of the at least one ground pad is at the bottom surface of the substrate, a side surface of the ground pattern is at a side surface of the substrate, and the shield layer on the bottom surface of the substrate is in contact with the bottom surface of the at least one ground pad and in contact with the side surface of the ground pattern.

公开(公告)号：US11217517B2

公开(公告)日：2022-01-04

申请号：US16835915

申请日：2020-03-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juhyeon Oh ,  Woojin Choi

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10 ,  H01L23/482 ,  H01L23/14 ,  H01L25/065 ,  H01L23/528

Abstract: A semiconductor package may include a substrate having an upper surface on which a plurality of first pads are disposed and a lower surface on which a plurality of second pads are disposed. The semiconductor package may further include a semiconductor chip disposed on the upper surface of the substrate on which connection electrodes connected to a first set of the plurality of first pads are disposed. The semiconductor package may include an interposer having an upper surface on which a plurality of first connection pads, connected to a second set of the plurality of first pads, and a plurality of second connection pads are disposed. The semiconductor package may further include a plurality of connection terminals disposed on a set of the plurality of second connection pads of the interposer, and a molding material disposed on the upper surface of the substrate.

公开(公告)号：US20240413026A1

公开(公告)日：2024-12-12

申请号：US18658546

申请日：2024-05-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yeongbeom KO ,  Seokgeun Ahn ,  Juhyeon Oh ,  Sanghoon Lee ,  Gwangjae Jeon

IPC: H01L23/13 ,  H01L23/00 ,  H01L23/498 ,  H01L25/065 ,  H10B80/00

Abstract: A semiconductor package includes a buffer die, a plurality of core die blocks sequentially stacked on the buffer die, and a molding member on the buffer die and covering outer surfaces of the plurality of core die blocks. Each of the plurality of core die blocks includes a first semiconductor chip, a second semiconductor chip disposed on the first semiconductor chip and a first gap filling portion, a third semiconductor chip disposed on the second semiconductor chip and a second gap filling portion, and a fourth semiconductor chip disposed on the third semiconductor chip.

公开(公告)号：US11437326B2

公开(公告)日：2022-09-06

申请号：US17032916

申请日：2020-09-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Juhyeon Oh ,  Sunchul Kim ,  Hyunki Kim

IPC: H01L21/50 ,  H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L23/16 ,  H01L25/18 ,  H01L21/52

Abstract: A semiconductor package includes a first substrate, a second substrate provided on the first substrate, a semiconductor chip provided between the first substrate and the second substrate, solder structures extending between the first substrate and the second substrate and spaced apart from the semiconductor chip, and bumps provided between the semiconductor chip and the second substrate. The solder structures electrically connect the first substrate and the second substrate.

公开(公告)号：US10825774B2

公开(公告)日：2020-11-03

申请号：US16424000

申请日：2019-05-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Juhyeon Oh ,  Sunchul Kim ,  Hyunki Kim

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L23/16 ,  H01L25/18 ,  H01L21/52

Abstract: A semiconductor package includes a first substrate, a second substrate provided on the first substrate, a semiconductor chip provided between the first substrate and the second substrate, solder structures extending between the first substrate and the second substrate and spaced apart from the semiconductor chip, and bumps provided between the semiconductor chip and the second substrate. The solder structures electrically connect the first substrate and the second substrate.