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公开(公告)号：US12182486B2
公开(公告)日：2024-12-31
申请号：US17491739
申请日：2021-10-01
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sangwoon Lee , Joohyun Jeon , Sungjin Kim , Seunghyun Kim , Wonki Roh , Chulwoo Park , Seongjae Byeon , Taeyoon An , Hyoeun Jung
IPC: G06F30/3308 , G06F30/25
Abstract: A method of modeling damages to a crystal caused by an incident particle includes obtaining particle information and crystal information; estimating energy loss of the incident particle based on the particle information and the crystal information; estimating a volume of a vacancy based on the energy loss; estimating a vacancy reaction based on the crystal information and the volume of the vacancy; and generating output data based on the vacancy reaction, the output data including quantification data of the damages.
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公开(公告)号：US10431680B2
公开(公告)日：2019-10-01
申请号：US15391888
申请日：2016-12-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sungsam Lee , Junsoo Kim , Hyoshin Ahn , Satoru Yamada , Joohyun Jeon , MoonYoung Jeong , Chunhyung Chung , Min Hee Cho , Kyo-Suk Chae , Eunae Choi
IPC: H01L29/78 , H01L29/423 , H01L29/04
Abstract: A semiconductor device including a semiconductor substrate including a trench, the semiconductor substrate having a crystal structure; and an insulating layer covering an inner sidewall of the trench, wherein the inner sidewall of the trench has at least one plane included in a {320} family of planes of the crystal structure or at least one plane similar to the {320} family of planes.
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Patent Agency Ranking
3.发明公开公开(公告)号：US20240274416A1
公开(公告)日：2024-08-15
申请号：US18430475
申请日：2024-02-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaesik An , Dongig Oh , Thanh Cuong Nguyen , Suntaek Lim , Seungmin Lee , Inkook Jang , Joohyun Jeon
CPC classification number: H01J37/32926 , H01J37/3476 , H01J2237/24585 , H01J2237/332
Abstract: Provided is a plasma process simulation method including defining a plasma reaction for a wafer, calculating a reaction parameter of the plasma reaction, and generating a plasma process simulation profile based on a calculated reaction parameter. The reaction parameter are set based on a physical reaction and a chemical reaction.
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公开(公告)号：US10658454B2
公开(公告)日：2020-05-19
申请号：US16573156
申请日：2019-09-17
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyuho Cho , Sangyeol Kang , Suhwan Kim , Sunmin Moon , Young-Lim Park , Jong-Bom Seo , Joohyun Jeon
Abstract: A capacitor includes a first electrode and a second electrode spaced apart from each other, a dielectric layer disposed between the first electrode and the second electrode, and a seed layer disposed between the first electrode and the dielectric layer. The dielectric layer includes a dielectric material having a tetragonal crystal structure. The seed layer includes a seed material that satisfies at least one of a lattice constant condition or a bond length condition.
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公开(公告)号：US20230422479A1
公开(公告)日：2023-12-28
申请号：US18133964
申请日：2023-04-12
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jeesun Lee , Junsoo Kim , Daehyun Moon , Namhyun Lee , Seonhaeng Lee , Sungho Jang , Joohyun Jeon , Joon Han
IPC: H10B12/00
CPC classification number: H10B12/315 , H10B12/34 , H10B12/482
Abstract: A semiconductor device includes a first active pattern included in an upper portion of a substrate in a memory cell region, and having an isolated shape extending so that a direction oblique to a first direction is a major axis direction of the first active pattern. A first device isolation pattern provided inside a first trench included in the substrate, and covering a side wall of the first active pattern is provided. A first gate structure is provided inside a gate trench extending in the first direction on upper portions of the first active pattern and the first device isolation pattern. A barrier impurity region is selectively formed only on surfaces of both side walls of a major axis of the first active pattern. First and second impurity regions are provided on the upper portion of the first active pattern adjacent to both sides of the first gate structure.
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公开(公告)号：US20220268830A1
公开(公告)日：2022-08-25
申请号：US17495487
申请日：2021-10-06
Applicant: Samsung Electronics Co., Ltd.
Inventor： Taeyoon An , Sangwoon Lee , Sungjin Kim , Seunghyun Kim , Wonki Roh , Chulwoo Park , Seongjae Byeon , Joohyun Jeon , Hyoeun Jung
Abstract: A method for predicting a defect in a semiconductor device includes: calculating a first probability that particles will be generated in a semiconductor element by radiation; calculating a second probability that damage will occur in the semiconductor element due to the particles; generating a training data set using input data and simulation data, the input data including damage data generated using the first probability and the second probability and including at least one of a position in which the damage will occur and an amount of the damage, impurity concentration of impurities doped in at least a portion of the semiconductor element, and structural data of the semiconductor element, and the simulation data including electrical characteristics of the semiconductor element obtained as a result of a simulation based on the input data; and training a machine learning model based on the training data set to generate a defect prediction model.
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公开(公告)号：US10453913B2
公开(公告)日：2019-10-22
申请号：US15938234
申请日：2018-03-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyuho Cho , Sangyeol Kang , Suhwan Kim , Sunmin Moon , Young-Lim Park , Jong-Bom Seo , Joohyun Jeon
Abstract: A capacitor includes a first electrode and a second electrode spaced apart from each other, a dielectric layer disposed between the first electrode and the second electrode, and a seed layer disposed between the first electrode and the dielectric layer. The dielectric layer includes a dielectric material having a tetragonal crystal structure. The seed layer includes a seed material that satisfies at least one of a lattice constant condition or a bond length condition.
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