公开(公告)号：US09177891B2

公开(公告)日：2015-11-03

申请号：US14045648

申请日：2013-10-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Keun-Nam Kim ,  Sun-Young Park ,  Soo-Ho Shin ,  Kye-Hee Yeom ,  Hyeon-Woo Jang ,  Jin-Won Jeong ,  Chang-Hyun Cho ,  Hyeong-Sun Hong

IPC: H01L23/52 ,  H01L23/48 ,  H01L27/108

CPC classification number: H01L27/0207 ,  H01L23/48 ,  H01L23/528 ,  H01L23/5329 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10888 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a plurality of bit lines that intersect an active region on a substrate and extend in a first direction, a contact pad formed on the active region between adjacent bit lines, and a plurality of spacers disposed on sidewalls of the plurality of bit lines. An upper portion of the contact pad is interposed between adjacent spacers, and a lower portion of the contact pad has a width greater than a distance between adjacent spacers.

Abstract translation: 半导体器件包括与衬底上的有源区相交并沿第一方向延伸的多个位线，形成在相邻位线之间的有源区上的接触焊盘和设置在多个位的侧壁上的多个间隔件 线条。 接触垫的上部插入在相邻间隔件之间，并且接触垫的下部具有大于相邻间隔件之间的距离的宽度。

公开(公告)号：US08878293B2

公开(公告)日：2014-11-04

申请号：US13767992

申请日：2013-02-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeon-Woo Jang ,  Won-Chul Lee ,  Jin-Won Jeong

IPC: H01L29/66 ,  H01L23/538 ,  H01L27/088

CPC classification number: H01L23/5384 ,  H01L21/76831 ,  H01L21/76877 ,  H01L21/76897 ,  H01L27/088 ,  H01L27/10876 ,  H01L27/10879 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes an interlayer insulating layer on a substrate, and a direct contact (DC) structure vertically penetrating the interlayer insulating layer and contacting the substrate, the DC structure including a DC hole exposing the substrate, an insulating DC spacer on an inner wall of the DC hole, and a conductive DC plug on the DC spacer and filling the DC hole, the DC plug including a lower DC plug and an upper DC plug on the lower DC plug, the lower DC plug having a smaller horizontal width than that of the upper DC plug.

Abstract translation: 半导体器件包括在基板上的层间绝缘层和垂直穿过层间绝缘层并与基板接触的直接接触（DC）结构，包括露出基板的DC孔的DC结构，内壁上的绝缘DC间隔物 DC直流插头和直流隔离件上的导电直流插头，并填充直流孔，直流插头包括下直流插头的下部直流插头和上部直流插头，下部直流插头的水平宽度小于 的上部直流插头。

公开(公告)号：US09607994B2

公开(公告)日：2017-03-28

申请号：US14755690

申请日：2015-06-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunnam Kim ,  Sunyoung Park ,  Kyehee Yeom ,  Hyeon-Woo Jang ,  Jin-Won Jeong ,  Changhyun Cho ,  HyeongSun Hong

IPC: H01L27/108 ,  H01L21/265 ,  H01L21/768

CPC classification number: H01L27/10888 ,  H01L21/26513 ,  H01L21/7682 ,  H01L21/76897 ,  H01L27/10855 ,  H01L27/10885

Abstract: Provided are semiconductor devices and methods of fabricating the same. In methods of forming the same, an etch stop pattern and a separate spacer can be formed on a sidewall of a bit line contact, wherein the etch stop pattern and the separate spacer each comprise material having an etch selectivity relative to an oxide. A storage node contact plug hole can be formed so that the etch stop pattern and the separate spacer form a portion of a sidewall of the storage node contact plug hole spaced apart from the bit line contact. The storage node contact plug hole can be cleaned to remove a natural oxide formed in the storage node contact plug hole. Related devices are also disclosed.

公开(公告)号：US09536868B2

公开(公告)日：2017-01-03

申请号：US14875385

申请日：2015-10-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Keun-Nam Kim ,  Sun-Young Park ,  Soo-Ho Shin ,  Kye-Hee Yeom ,  Hyeon-Woo Jang ,  Jin-Won Jeong ,  Chang-Hyun Cho ,  Hyeong-Sun Hong

IPC: H01L23/48 ,  H01L27/02 ,  H01L23/528 ,  H01L23/532 ,  H01L27/108

CPC classification number: H01L27/0207 ,  H01L23/48 ,  H01L23/528 ,  H01L23/5329 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10888 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a plurality of bit lines that intersect an active region on a substrate and extend in a first direction, a contact pad formed on the active region between adjacent bit lines, and a plurality of spacers disposed on sidewalls of the plurality of bit lines. An upper portion of the contact pad is interposed between adjacent spacers, and a lower portion of the contact pad has a width greater than a distance between adjacent spacers.

Abstract translation: 半导体器件包括与衬底上的有源区相交并沿第一方向延伸的多个位线，形成在相邻位线之间的有源区上的接触焊盘和设置在多个位的侧壁上的多个间隔件 线条。 接触垫的上部插入在相邻间隔件之间，并且接触垫的下部具有大于相邻间隔件之间的距离的宽度。