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1.发明申请FILM FOR SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE USING FILM AND DISPLAY DEVICE INCLUDING THE SAME 有权用于半导体封装的薄膜，使用薄膜的半导体封装和包括其的显示器件公开(公告)号：US20160197020A1
公开(公告)日：2016-07-07
申请号：US14964523
申请日：2015-12-09
Applicant: Samsung Electronics Co., Ltd.
Inventor： Soyoung LIM , JaeMin JUNG , Jeong-Kyu HA , Donghan KIM
IPC: H01L21/66 , H01L23/498 , H01L23/00
CPC classification number: H01L22/32 , G09G5/003 , G09G2310/0264 , H01L23/49811 , H01L23/49827 , H01L23/49838 , H01L23/4985 , H01L23/66 , H01L24/09 , H01L24/16 , H01L2223/6616 , H01L2224/0912 , H01L2224/1415 , H01L2224/16157 , H01L2224/16235 , H01L2224/16238 , H01L2224/73204
Abstract: A semiconductor package may include a first output test pad and a second output test pad disposed on a first surface of an insulating film, and a semiconductor chip disposed between the first output test pad and the second output test pad on a second surface opposing to the first surface of the insulating film.
Abstract translation: 半导体封装可以包括设置在绝缘膜的第一表面上的第一输出测试焊盘和第二输出测试焊盘，以及设置在与第一输出测试焊盘和第二输出测试焊盘相对的第二表面上的第二输出测试焊盘之间的半导体芯片 绝缘膜的第一表面。
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公开(公告)号：US20140328031A1
公开(公告)日：2014-11-06
申请号：US14262658
申请日：2014-04-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： KYOUNGSUK YANG , Jeong-Kyu HA , PaLan LEE , NARAE SHIN , Soyoung LIM , Jae-Min JUNG , KyongSoon CHO
CPC classification number: H05K1/118 , H05K1/147 , H05K1/189 , H05K2201/0949 , H05K2201/10128
Abstract: Provided is a display apparatus. The display apparatus includes a display panel, a flexible circuit film having a rear surface connected to the display panel, and a front surface opposite to the rear surface, the front surface having a chip mounted thereon, and a first lead bonding portion electrically connecting the chip to the display panel. The first lead bonding portion includes a first portion connected to the chip and overlying a portion of the flexible circuit film, a second portion passing through the flexible circuit film, and a third portion disposed between the flexible circuit film and the display panel on the rear surface of the flexible circuit film, where the third portion overlaps the first portion.
Abstract translation: 提供了一种显示装置。 显示装置包括显示面板，具有连接到显示面板的后表面的柔性电路薄膜和与背面相对的前表面，前表面具有安装在其上的芯片，以及第一引线接合部分， 芯片到显示面板。 第一引线接合部分包括连接到芯片并覆盖柔性电路膜的一部分的第一部分，穿过柔性电路膜的第二部分和设置在柔性电路膜和后面的显示面板之间的第三部分 柔性电路膜的表面，其中第三部分与第一部分重叠。
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公开(公告)号：US20190213373A1
公开(公告)日：2019-07-11
申请号：US16027620
申请日：2018-07-05
Applicant: Samsung Electronics Co., Ltd.
Inventor： Woonbae KIM , Jikho SONG , Sungeun JO , Ji-Yong PARK , Jeong-Kyu HA
IPC: G06K9/00 , G09G3/3208
Abstract: Disclosed are fingerprint sensor packages and display apparatuses including the same. The fingerprint sensor package comprises a flexible film having a top surface and a bottom surface opposite to the top surface, a fingerprint sensor surrounded by a cap, and a display driver integrated circuit on the flexible film. The fingerprint sensor and the display driver integrated circuit are mounted on the top surface of the flexible film.
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公开(公告)号：US20140327148A1
公开(公告)日：2014-11-06
申请号：US14259200
申请日：2014-04-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： So-Young LIM , Na-Rae SHIN , Jeong-Kyu HA , Kyoung-Suk YANG , Pa-Lan LEE
IPC: H01L23/48
CPC classification number: H01L23/49541 , H01L23/00 , H01L23/4824 , H01L23/49838 , H01L23/4985 , H01L24/16 , H01L2224/16225 , H05K1/118
Abstract: A chip on film (COF) package includes a film substrate, first leads on a first surface of the film substrate, the first leads having a first length, and second leads on the first surface of the film substrate, the second leads having a second length larger than the first length, first via plugs penetrating the film substrate and connected to first ends of the first leads, and second via plugs penetrating the film substrate and connected to first ends of the second leads, and first connection leads on a second surface of the film substrate facing the first surface, the first connection leads having first ends connected to the first via plugs, and second connection leads on the second surface of the film substrate, the second connection leads having first ends electrically connected to the second via plugs.
Abstract translation: 膜芯片（COF）封装包括薄膜基板，第一引线在薄膜基板的第一表面上，第一引线具有第一长度，第二引线在薄膜基板的第一表面上，第二引线具有第二引线 长度大于第一长度，首先通过插入薄膜基板并连接到第一引线的第一端的插塞，以及穿过薄膜基片并连接到第二引线的第一端的第二通孔塞，第二表面上的第一连接引线 所述第一连接引线具有连接到所述第一通孔的第一端和所述薄膜基板的第二表面上的第二连接引线，所述第二连接引线具有电连接到所述第二通孔塞 。
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公开(公告)号：US20240413071A1
公开(公告)日：2024-12-12
申请号：US18623666
申请日：2024-04-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Narae SHIN , Jeong-Kyu HA
IPC: H01L23/498 , H01L23/00
Abstract: Provided is a semiconductor package including a film substrate including a sprocket hole, a semiconductor chip on the film substrate, interconnection lines connected to the semiconductor chip, a dummy pattern between the sprocket hole and the semiconductor chip, and a cutting pattern between the semiconductor chip and the dummy pattern, wherein the cutting pattern is spaced apart from the interconnection lines and the dummy pattern in a first direction.
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Patent Agency Ranking
公开(公告)号：US20230037785A1
公开(公告)日：2023-02-09
申请号：US17699525
申请日：2022-03-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： KwanJai LEE , Jae-Min JUNG , Jeong-Kyu HA , Sang-Uk HAN
IPC: H01L23/498 , H01L23/00
Abstract: A chip-on-film package may include a film substrate including a chip region and an edge region, a semiconductor chip provided on the chip region and mounted on a top surface of the film substrate, the semiconductor chip including a chip pad adjacent to a bottom surface thereof, an input line and an output line provided on the edge region and disposed on the top surface of the film substrate, a connection terminal interposed between the film substrate and the semiconductor chip, and a redistribution pattern disposed between the semiconductor chip and the connection terminal.
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公开(公告)号：US20200372232A1
公开(公告)日：2020-11-26
申请号：US16989974
申请日：2020-08-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： WOONBAE KIM , Jikho SONG , Sungeun JO , Ji-Yong PARK , Jeong-Kyu HA
IPC: G06K9/00 , G09G3/3208
Abstract: Disclosed are fingerprint sensor packages and display apparatuses including the same. The fingerprint sensor package comprises a flexible film having a top surface and a bottom surface opposite to the top surface, a fingerprint sensor surrounded by a cap, and a display driver integrated circuit on the flexible film. The fingerprint sensor and the display driver integrated circuit are mounted on the top surface of the flexible film.
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公开(公告)号：US20170125314A1
公开(公告)日：2017-05-04
申请号：US15404110
申请日：2017-01-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Soyoung LIM , JaeMin JUNG , Jeong-Kyu HA , Donghan KIM
IPC: H01L21/66 , H01L23/498 , H01L23/66 , H01L23/00
CPC classification number: H01L22/32 , G09G5/003 , G09G2310/0264 , H01L23/49811 , H01L23/49827 , H01L23/49838 , H01L23/4985 , H01L23/66 , H01L24/09 , H01L24/16 , H01L2223/6616 , H01L2224/0912 , H01L2224/1415 , H01L2224/16157 , H01L2224/16235 , H01L2224/16238 , H01L2224/73204
Abstract: A semiconductor package may include a first output test pad and a second output test pad disposed on a first surface of an insulating film, and a semiconductor chip disposed between the first output test pad and the second output test pad on a second surface opposing to the first surface of the insulating film.
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公开(公告)号：US20160049356A1
公开(公告)日：2016-02-18
申请号：US14714234
申请日：2015-05-15
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jae-Min JUNG , Jeong-Kyu HA
IPC: H01L23/498 , H01L25/065
CPC classification number: H01L23/4985 , G02F1/13452 , G02F1/13458 , H01L23/481 , H01L23/49827 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/81 , H01L24/83 , H01L24/86 , H01L2224/13144 , H01L2224/16227 , H01L2224/2919 , H01L2224/32225 , H01L2224/73204 , H01L2224/81203 , H01L2224/81424 , H01L2224/81447 , H01L2224/81455 , H01L2224/83104 , H01L2224/83862 , H01L2224/86203 , H01L2924/00014 , H05K1/028 , H05K1/112 , H05K1/118 , H05K1/189 , H05K2201/055 , H05K2201/09227 , H05K2201/10128 , H05K2201/10674 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/85399 , H01L2224/05599
Abstract: A chip-on-film package comprises a film substrate comprising upper and lower surfaces, and a side having a bending part. A first output interconnection formed on the upper surface of the film substrate extends from a semiconductor chip disposed on the upper surface toward the bending part. A second output interconnection includes an upper output interconnection formed on the upper surface of the film substrate, and a lower output interconnection formed on the lower surface and extending onto the bending part. An input interconnection includes an upper input interconnection formed on the upper surface of the film substrate and a lower input interconnection formed on the lower surface and extending away from the bending part. Through-vias are formed to pass through the film substrate and electrically connect the upper output interconnection to the lower output interconnection, and the upper input interconnection to the lower input interconnection.
Abstract translation: 片上胶卷包装包括一个包括上表面和下表面的薄膜基材和一个具有弯曲部分的一面。 形成在薄膜基板的上表面上的第一输出互连件从设置在上表面上的半导体芯片朝向弯曲部分延伸。 第二输出互连包括形成在薄膜基板的上表面上的上输出互连和形成在下表面上并延伸到弯曲部上的下输出互连。 输入互连包括形成在薄膜基板的上表面上的上输入互连和形成在下表面上并且远离弯曲部延伸的下输入互连。 通孔形成为通过薄膜基板并将上部输出互连电连接到下部输出互连，并将上部输入互连电连接到下部输入互连。
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10.发明公开公开(公告)号：US20240079312A1
公开(公告)日：2024-03-07
申请号：US18505613
申请日：2023-11-09
Applicant: Samsung Electronics Co., Ltd.
Inventor： KwanJai LEE , Jae-Min JUNG , Jeong-Kyu HA , Sang-Uk HAN
IPC: H01L23/498 , H01L23/00
CPC classification number: H01L23/4985 , H01L23/49838 , H01L23/49894 , H01L24/73 , H01L2224/73204
Abstract: A chip-on-film package may include a film substrate including a chip region and an edge region, a semiconductor chip provided on the chip region and mounted on a top surface of the film substrate, the semiconductor chip including a chip pad adjacent to a bottom surface thereof, an input line and an output line provided on the edge region and disposed on the top surface of the film substrate, a connection terminal interposed between the film substrate and the semiconductor chip, and a redistribution pattern disposed between the semiconductor chip and the connection terminal.
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