FILM PACKAGE
    2.
    发明公开
    FILM PACKAGE 审中-公开

    公开(公告)号:US20230178450A1

    公开(公告)日:2023-06-08

    申请号:US17892252

    申请日:2022-08-22

    CPC classification number: H01L23/367 H01L23/5283

    Abstract: A film package, includes: a film substrate having first and second surfaces opposing each other; a plurality of wiring patterns respectively including an input pattern, an output pattern, and an interconnection pattern; a first semiconductor chip electrically connected to the input pattern and the interconnection pattern; a second semiconductor chip electrically connected to the interconnection pattern and the output pattern; a protective layer on the first surface to cover at least a portion of the plurality of wiring patterns; a first conductive film on the protective layer and extending in a second direction; and a second conductive film on the second surface to overlap the first conductive film in a third direction.

    IMAGE SENSOR PACKAGE
    3.
    发明申请

    公开(公告)号:US20200373341A1

    公开(公告)日:2020-11-26

    申请号:US16667041

    申请日:2019-10-29

    Abstract: An image sensor package including an image sensor chip including an active pixel sensor region and a non-sensing region, a plurality of chip pads being in the non-sensing region; a printed circuit board on one side of the image sensor chip, the printed circuit board including a plurality of bonding pads; conductive wires respectively connecting the plurality of chip pads to the plurality of bonding pads; a bonding dam at a periphery of the active pixel sensor region; a cover glass on the bonding dam and facing another side of the image sensor chip; and an encapsulation layer covering a side surface of the bonding dam, a side surface of the cover glass, an edge of a lower surface of the cover glass, the non-sensing region, and an edge of an upper surface of the printed circuit board, wherein the bonding dam is spaced apart from an end of a side surface of the image sensor chip by a distance of 80 μm to 150 μm has a height of 50 μm to 150 μm from the image sensor chip, and has a width of 160 μm to 240 μm.

    SYSTEM, APPARATUS, AND METHOD WITH IMMERSION COOLING

    公开(公告)号:US20240268068A1

    公开(公告)日:2024-08-08

    申请号:US18357493

    申请日:2023-07-24

    CPC classification number: H05K7/20281 H05K7/20236 H05K7/20272

    Abstract: An immersion cooling system including an electronic device including a plurality of boards, the electronic device being configured in the immersive cooling system to be immersed in refrigerant that a reservoir is configured to accommodate, a pump array including a plurality of pumps disposed inside the reservoir, each pump of the plurality of pumps configured to individually generate a flow of the refrigerant by performing a discharging of the refrigerant, and a controller, the controller being configured to individually control an operation of each pump of the plurality of pumps, determine a board of the plurality of boards that requires cooling, identify a pump corresponding to the determined board among the plurality of pumps, and increase a flow quantity of the refrigerant discharged from the identified pump.

    COMPUTING SYSTEM WITH COOLING CONFIGURATION

    公开(公告)号:US20250053208A1

    公开(公告)日:2025-02-13

    申请号:US18767342

    申请日:2024-07-09

    Abstract: A system includes a main board and sub-board units connected thereto. Each sub-board unit includes: a first sub-board connected to the main board and first chips arranged on a side of the first sub-board; a second sub-board connected to the main board and second chips arranged on a side of the second sub-board; and a cooling structure between the first sub-board and the second sub-board. The first sub-board and the second sub-board are arranged such that the side of the first sub-board and side of the second sub-board both face the cooling structure. A first region of the first sub-board defined by an outline of a first chip is directly opposite an identical second region of the second sub-board, and at least a portion of a second chip that corresponds to the first chip is outside the second region.

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