公开(公告)号：US10720209B2

公开(公告)日：2020-07-21

申请号：US16210279

申请日：2018-12-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun Kook Park ,  Young Hoon Oh ,  Chi Weon Yoon ,  Yong Jun Lee ,  Chea Ouk Lim

IPC: G11C13/00 ,  G11C7/10

Abstract: A resistive memory element or device includes: a first, main, memory cell area including a plurality of first resistive memory cells; and a second, buffer, memory cell area including a plurality of second resistive memory cells. The first resistive memory cells of the main memory cell area are configured to store data therein, and the second resistive memory cells of the buffer memory cell area are configured to temporarily store portions of the data therein for at least a stabilization time period while the portions of the data stabilize in the main memory cell area.

公开(公告)号：US10181348B2

公开(公告)日：2019-01-15

申请号：US15677055

申请日：2017-08-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun Kook Park ,  Young Hoon Oh ,  Chi Weon Yoon ,  Yong Jun Lee ,  Chea Ouk Lim

IPC: G11C7/00 ,  G11C13/00 ,  G11C7/10

Abstract: A resistive memory element or device includes: a first, main, memory cell area including a plurality of first resistive memory cells; and a second, buffer, memory cell area including a plurality of second resistive memory cells. The first resistive memory cells of the main memory cell area are configured to store data therein, and the second resistive memory cells of the buffer memory cell area are configured to temporarily store portions of the data therein for at least a stabilization time period while the portions of the data stabilize in the main memory cell area.

公开(公告)号：US10074426B2

公开(公告)日：2018-09-11

申请号：US15677052

申请日：2017-08-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chea Ouk Lim ,  Hyun Kook Park ,  Jung Sunwoo ,  Young Hoon Oh ,  Yong Jun Lee

IPC: G11C13/00 ,  G06F11/10 ,  G11C29/52

CPC classification number: G11C13/0069 ,  G06F11/1048 ,  G06F11/1068 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/003 ,  G11C13/004 ,  G11C29/52 ,  G11C2013/0076 ,  G11C2029/0411 ,  G11C2213/71 ,  G11C2213/72 ,  G11C2213/76 ,  G11C2213/79

Abstract: A memory device having a resistance change material and an operating method of the memory device are provided. A memory device includes a memory cell array including first and second resistive memory cells, which store different data according to the change of their resistance; a buffer including first and second storage regions corresponding to the first and second resistive memory cells, respectively; and a control circuit receiving program data to be programmed to the memory cell array, comparing first data stored in the first storage region and second data stored in the first resistive memory cell, and as a result of the comparison determining one of the first and second storage regions as a storage region to which to write the program data.

公开(公告)号：US10340000B2

公开(公告)日：2019-07-02

申请号：US15795245

申请日：2017-10-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun Kook Park ,  Jung Sunwoo ,  Chi Weon Yoon

IPC: G11C13/00

Abstract: An operating method of a memory device is provided. Using a statistical model, a resistance Rdyn of a variable resistor of a memory cell and a variation ΔRdyn of the resistance Rdyn are determined. Based on the resistance Rdyn and the variation ΔRdyn of the resistance Rdyn, an average resistance Rdyn_avg and a beta value of the variable resistor are determined. Then, using the average resistance Rdyn_avg and the beta value, a resistance Ra of an insertion resistor, connected between the memory cell and a power supply generator for generating a power supply voltage VPGM, is determined.

公开(公告)号：US09966132B2

公开(公告)日：2018-05-08

申请号：US15478679

申请日：2017-04-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hye Jin Yim ,  Il Han Park ,  Hyun Kook Park ,  Sung Won Yun

IPC: G11C16/04 ,  G11C11/56 ,  G11C16/08 ,  G11C16/34

CPC classification number: G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/3459 ,  G11C2211/5648

Abstract: A method for programming a non-volatile memory device includes programming a lower bit in a memory cell included in the non-volatile memory device, reading the lower bit programmed in the memory cell before programming an upper bit in the memory cell, determining a threshold voltage of the memory cell according to a result of reading the lower bit, determining a type of the memory cell using the threshold voltage, and supplying one of a plurality of pulses to a bit line connected to the memory cell according to the determined type of the memory cell.