公开(公告)号：US11713248B2

公开(公告)日：2023-08-01

申请号：US17138194

申请日：2020-12-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changseok Lee ,  Changhyun Kim ,  Kyung-Eun Byun ,  Keunwook Shin ,  Hyeonjin Shin ,  Eunkyu Lee

IPC: C23C16/26 ,  C01B32/186 ,  C01B32/194 ,  C23C16/513 ,  C23C16/04 ,  C23C16/02

CPC classification number: C01B32/186 ,  C01B32/194 ,  C23C16/02 ,  C23C16/04 ,  C23C16/26 ,  C23C16/513

Abstract: A method of selectively growing graphene includes forming an ion implantation region and an ion non-implantation region by implanting ions locally into a substrate; and selectively growing graphene in the ion implantation region or the ion non-implantation region.

公开(公告)号：US11626502B2

公开(公告)日：2023-04-11

申请号：US17398363

申请日：2021-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjin Shin ,  Sangwon Kim ,  Kyung-Eun Byun ,  Hyunjae Song ,  Keunwook Shin ,  Eunkyu Lee ,  Changseok Lee ,  Yeonchoo Cho ,  Taejin Choi

IPC: H01L29/45 ,  H01L29/40 ,  H01L29/15 ,  H01L27/108

Abstract: An interconnect structure for reducing a contact resistance, an electronic device including the same, and a method of manufacturing the interconnect structure are provided. The interconnect structure includes a semiconductor layer including a first region having a doping concentration greater than a doping concentration of a peripheral region of the semiconductor layer, a metal layer facing the semiconductor layer, a graphene layer between the semiconductor layer and the metal layer, and a conductive metal oxide layer between the graphene layer and the semiconductor and covering the first region.

公开(公告)号：US20220077154A1

公开(公告)日：2022-03-10

申请号：US17318563

申请日：2021-05-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Huijung Kim ,  Minwoo Kwon ,  Sangyeon Han ,  Sangwon Kim ,  Junsoo Kim ,  Hyeonjin Shin ,  Eunkyu Lee

IPC: H01L27/108 ,  H01L29/78 ,  H01L29/423

Abstract: A semiconductor device includes a substrate including an active region, a gate structure disposed in a gate trench in the substrate, a bit line disposed on the substrate and electrically connected to the active region on one side of the gate structure, and a capacitor disposed on the bit line and electrically connected to the active region on another side of the gate structure. The gate structure includes a gate dielectric layer disposed on bottom and inner side surfaces of the gate trench, a conductive layer disposed on the gate dielectric layer in a lower portion of the gate trench, sidewall insulating layers disposed on the gate dielectric layer, on an upper surface of the conductive layer, a graphene conductive layer disposed on the conductive layer, and a buried insulating layer disposed between the sidewall insulating layers on the graphene conductive layer.

公开(公告)号：US10186545B2

公开(公告)日：2019-01-22

申请号：US15244073

申请日：2016-08-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeho Lee ,  Kiyoung Lee ,  Sangyeob Lee ,  Eunkyu Lee ,  Jinseong Heo ,  Seongjun Park

IPC: H01L27/146 ,  H01L31/032 ,  H01L31/0352 ,  H01L31/109

Abstract: An image sensor may include visible light detectors and a near-infrared light detector. The near-infrared light detector may contain a material highly sensitive to near-infrared rays, and thus the size of the near-infrared light detector may be reduced.

公开(公告)号：US11906291B2

公开(公告)日：2024-02-20

申请号：US17145966

申请日：2021-01-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunkyu Lee ,  Yeonchoo Cho ,  Sangwon Kim ,  Kyung-Eun Byun ,  Hyunjae Song ,  Hyeonjin Shin

IPC: G01B15/02 ,  G01N23/2208 ,  H01L21/285 ,  H01L21/66 ,  H01L29/45 ,  G01N23/2273

CPC classification number: G01B15/02 ,  G01N23/2208 ,  G01N23/2273 ,  H01L21/28512 ,  H01L22/12 ,  H01L29/45 ,  G01N2223/085 ,  G01N2223/61

Abstract: A method of calculating a thickness of a graphene layer and a method of measuring a content of silicon carbide, by using X-ray photoelectron spectroscopy (XPS), are provided. The method of calculating the thickness of the graphene layer, which is directly grown on a silicon substrate, includes measuring the thickness of the graphene layer directly grown on the silicon substrate, by using a ratio between a signal intensity of a photoelectron beam emitted from the graphene layer and a signal intensity of a photoelectron beam emitted from the silicon substrate.

公开(公告)号：US20240047564A1

公开(公告)日：2024-02-08

申请号：US18321290

申请日：2023-05-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joungeun YOO ,  Changhyun Kim ,  Kyung-Eun Byun ,  Minsu Seol ,  Keunwook Shin ,  Eunkyu Lee

IPC: H01L29/76 ,  H01L29/24

CPC classification number: H01L29/7606 ,  H01L29/24

Abstract: A semiconductor device may include a channel layer including a two-dimensional (2D) semiconductor material, a gate insulating layer on a center portion of the channel layer, a gate electrode on the gate insulating layer, and a first conductive layer and a second conductive layer respectively contacting opposite sides of the channel layer. Each of the first and second conductive layers may include metal boride.

公开(公告)号：US11626489B2

公开(公告)日：2023-04-11

申请号：US17541871

申请日：2021-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeho Lee ,  Hyeonjin Shin ,  Dongwook Lee ,  Seongjun Park ,  Kiyoung Lee ,  Eunkyu Lee ,  Sanghyun Jo ,  Jinseong Heo

IPC: H01L31/0352 ,  H01L29/16 ,  H01L31/09 ,  H01L31/028 ,  H01L31/101 ,  H01L51/05 ,  H01L51/00 ,  H01L27/144 ,  H01L27/146 ,  H01L27/15 ,  H01L29/12 ,  H01L27/30

Abstract: Provided are an optical sensor including graphene quantum dots and an image sensor including an optical sensing layer. The optical sensor may include a graphene quantum dot layer that includes a plurality of first graphene quantum dots bonded to a first functional group and a plurality of second graphene quantum dots bonded to a second functional group that is different from the first functional group. An absorption wavelength band of the optical sensor may be adjusted based on types of functional groups bonded to the respective graphene quantum dots and/or sizes of the graphene quantum dots.

公开(公告)号：US11094538B2

公开(公告)日：2021-08-17

申请号：US16260403

申请日：2019-01-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook Shin ,  Changhyun Kim ,  Kaoru Yamamoto ,  Changseok Lee ,  Hyunjae Song ,  Eunkyu Lee ,  Kyung-Eun Byun ,  Hyeonjin Shin ,  Sungjoo An

IPC: H01L21/02 ,  H01L29/16

Abstract: Provided is a method of forming graphene. The method of forming graphene includes treating a surface of a substrate placed in a reaction chamber with plasma while applying a bias to the substrate, and growing graphene on the surface of the substrate by plasma enhanced chemical vapor deposition (PECVD).

公开(公告)号：US20170117430A1

公开(公告)日：2017-04-27

申请号：US15085100

申请日：2016-03-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong Heo ,  Seongjun Park ,  Kiyoung Lee ,  Sangyeob Lee ,  Eunkyu Lee ,  Jaeho Lee

IPC: H01L31/109 ,  H01L31/18 ,  H01L31/0336 ,  H01L31/0392 ,  H01L31/028 ,  H01L31/032

CPC classification number: H01L31/1075 ,  H01L27/144 ,  H01L27/14603 ,  H01L29/1606 ,  H01L29/267 ,  H01L29/66015 ,  H01L29/6603 ,  H01L31/02327 ,  H01L31/028 ,  H01L31/032 ,  H01L31/0326 ,  H01L31/0336 ,  H01L31/0392 ,  H01L31/09 ,  H01L31/105 ,  H01L31/109 ,  H01L31/1136 ,  H01L31/18 ,  Y02E10/547

Abstract: A photodetector includes an insulating layer on a substrate, a first graphene layer on the insulating layer, a 2-dimensional (2D) material layer on the first graphene layer, a second graphene layer on the 2D material layer, a first electrode on the first graphene layer, and a second electrode on the second graphene layer. The 2D material layer includes a barrier layer and a light absorption layer. The barrier layer has a larger bandgap than the light absorption layer.

公开(公告)号：US12127394B2

公开(公告)日：2024-10-22

申请号：US18298230

申请日：2023-04-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Huijung Kim ,  Minwoo Kwon ,  Sangyeon Han ,  Sangwon Kim ,  Junsoo Kim ,  Hyeonjin Shin ,  Eunkyu Lee

IPC: H10B12/00 ,  H01L21/28 ,  H01L29/423 ,  H01L29/78

CPC classification number: H10B12/34 ,  H01L21/28026 ,  H01L29/42356 ,  H01L29/4236 ,  H01L29/7813 ,  H10B12/053 ,  H10B12/315

Abstract: A semiconductor device includes a substrate including an active region, a gate structure disposed in a gate trench in the substrate, a bit line disposed on the substrate and electrically connected to the active region on one side of the gate structure, and a capacitor disposed on the bit line and electrically connected to the active region on another side of the gate structure. The gate structure includes a gate dielectric layer disposed on bottom and inner side surfaces of the gate trench, a conductive layer disposed on the gate dielectric layer in a lower portion of the gate trench, sidewall insulating layers disposed on the gate dielectric layer, on an upper surface of the conductive layer, a graphene conductive layer disposed on the conductive layer, and a buried insulating layer disposed between the sidewall insulating layers on the graphene conductive layer.